no power verilog operator?

Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob
sccac_1236541
Level 4
Level 4

 Hi, 

   

 I'm writing my own component and I was wondering if there is a power verilog operator?  I don't see any documentation on it and I keep getting a syntax error whenever I try to use the ** in my code.

   

Thanks,

   

Scarlson

0 Likes
1 Solution
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

In Cypress help, documentation, warp verilog guide I see no operator listed -

   

 

   

   

 

   

 

   

But in Cadence manual this -

   

 

   

   

 

   

Regards, Dana.

View solution in original post

0 Likes
4 Replies
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

In Cypress help, documentation, warp verilog guide I see no operator listed -

   

 

   

   

 

   

 

   

But in Cadence manual this -

   

 

   

   

 

   

Regards, Dana.

0 Likes
sccac_1236541
Level 4
Level 4

 so I'm guessing thats a no for verilog then?  the cadence manual is referring to VHDL, while the other is referring to verilog.  

0 Likes
ETRO_SSN583
Level 9
Level 9
250 likes received 100 sign-ins 5 likes given

Seems like its hard to completely disassociate Warp VHDL and Warp Verilog, from the Cypress manual

   

introduction -

   

 

   

   

 

   

Point being Verilog is RTL based like VHDL, and seems like its an extension

   

to VHDL at some level ? Not an expert here, you are talking to a dunce.

   

 

   

Regards, Dana.

0 Likes
sccac_1236541
Level 4
Level 4
        Thanks Dana, You've at least confirmed I wasn't just missing something obvious. If anyone else has any insight into this it would be appreciated. any kind of work arounds besides relying on the processor side of psoc? Thanks, scarlson   
0 Likes