PSoC™ Creator & Designer Forum Discussions
Hello,
I have a PSoc -5LP(CY8C5888LTI-LP097) device that I could not program. Whenever I try to program using PSoc Creator 4.2 it keeps showing on the comments that my firmware should be upgraded (from 2.19 to 2.2 I am not mistaken). The image is similar to the one shown in the first attachment. Unfortunately after I erased some Windows Driver Packages for Cypress from my Windows 10 under Programs(stupid mistake) the image became blank(pl. see attachment 2). To make matters worse I could not get it back to the previous display.
Any assistance regarding this problem is greatly appreciated. I use this for the class in Robotics. Thank you so much in advance.
Show LessHi,
I'm new to PSoC and I'm having trouble getting the Status Register to work with a clock.
I'm interfacing a CY8CKIT-059 to a 6502 microprocessor. The way the 6502 accesses memory is that it sets the address lines and the R/~W signal, then about 225ns later, it raises the ph2 clock. For a memory read, the memory (in my case the PSoC) should read the address and put the data on the data bus. About 500ns after that, the ph2 clock goes low. On a memory write, that's when the memory (in my case the PSoC) should capture the data that the 6502 put on the bus.
I have Status Registers that capture the address lines and the 6502's data output. (Actually, my schematic converts the 16 bit 6502 address into a 32 bit PSoC memory location, and that's what goes into the Status Registers. There's 225ns between the address being valid and the ph2 going high, so my schematic's logic has plenty of time to work.) If I make my registers transparent, the firmware can read the address correctly. But if I make them sticky, clocked by ph2 (after it's passed through an asynchronous UDBClkEn), the firmware reads zero for the address.
What am I doing wrong (my project is attached)?
Thank you,
Bob
Show LessHello,
I'm working with PSoC 4 (device CY8C4247LQI-BL473). PSoC Creator's version is 4.2.
If I connect an input pin directly to UART component input, it works fine. But when I insert a NOT gate between the input pin and the UART input, I get the following error:
--------------- Build Started: 01/07/2020 08:59:36 Project: idf07-bomba, Configuration: ARM GCC 5.4-2016-q2-update Debug ---------------
cydsfit.exe -.appdatapath "C:\Users\projetos5\AppData\Local\Cypress Semiconductor\PSoC Creator\4.2" -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\yuri\projetos\projetos-companytec\idf07\firmware\idf07-bomba.cydsn\idf07-bomba.cyprj -d CY8C4247LQI-BL473 -s C:\yuri\projetos\projetos-companytec\idf07\firmware\idf07-bomba.cydsn\Generated_Source\PSoC4 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
Elaborating Design...
HDL Generation...
Synthesis...
Tech Mapping...
ADD: pft.M0040: information: The following 1 pin(s) will be assigned a location by the fitter: DEBUG_DUMMY(0)
Analog Placement...
Analog Routing...
Analog Code Generation...
Digital Placement...
Digital Routing...
Error: rtr.M0004: E1216: Routing of net Net_348 Failed. Source : :udb@[UDB=(1,1)]:pld1:mc3.q, Sink : :m0s8scbcell_1.uart_rx
Error: rtr.M0004: Error routing design: Routing Failed (12)
Dependency Generation...
Cleanup...
Error: fit.M0050: The fitter aborted due to errors, please address all errors and rebuild. (App=cydsfit)
--------------- Build Failed: 01/07/2020 08:59:45 ---------------
I am trying to export PSoC Creator 4.2 project for PSoC 6 to eclipse via CMSIS pack.
I am trying to follow the guide in help -> PSoC Creator help topics -> Using PSoC 6 Designs in Eclipse
This guide seems outdated.
Currently I am in this step:
"
Cypress Toolchain Adapter Feature
As a convenience to our PSoC Creator/Eclipse users, Cypress provides a small "toolchain adapter" feature, which populates several Eclipse project tool settings for projects imported from PSoC Creator, saving time and reducing the chances of incorrectly typed tool setting values. The feature can be downloaded as a ZIP archive from the PSoC Creator downloads page:
http://www.cypress.com/products/psoc-creator-integrated-design-environment-ide
"
The download link is missing!
could you please update the guide and provide me the link for "PSoC Device Project Utilities"
Thank you.
Show LessUsing Psoc creater 4.2 for BLE development.
I have been going through some of the turtorials, but some of them use the logic components (AND,OR NOT etc.) But theese components are not avilble in my setup, how can i enable theese ?
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Dear all,
I have a software example that works on PSOC creator 2.2.
The issues is that our circuit design is limited in space and smaller component is needed,
namely CY8C3866FNI-210 which is not available to choose on PSOC creator 2.2.
How can I add this device?
p.s. the software just would not work with newer PSOC Creator(unable to link iAP2 function prototype)
Show LessHello,
If I implement the debouncer circuit in Figure 13 of AN60024 the results I get at runtime are not what I expect (PSoC 5LP). My code is basic as it just receives the interrupt, reads the status register into a volatile variable, and then the main for loop just detects a non-zero status variable, displays the binary value to an LCD, and clears the variable. I would expect when I press the button the output would be 0b01 and when I release the button the output would be 0b10. Instead when I press the button I get an 0b01 and when I release the button I get an 0b11. What is even stranger is when I run the code through the dubugger it seems to behave as what I expect.
Further digging I now see why it is behaving the way it is. The debouncer has a 50 Hz clock and when a button is pressed or released a 20 ms. pulse is generated on the appropriate outputs of the debouncer. The status register quickly reads in that pulse because it has a 24 MHz clock input and 'sticks' it to the appropriate register bin. When the interrupt code is executed the status register is read and cleared, but because the 20 ms. pulse is still in a high state (20 ms. is an eternity), the 24 MHz clock cycle just re-reads in that high value and keeps it in the register basically resetting what was cleared in the interrupt routine.
My workaround was to make the status registers transparent and it works as planned.
Has anyone else experienced this? Am I missing something here? I find it odd how AN60024 has been around for a while, yet I could find no mention of this behavior in the development community.
Thanks and regards
Show LessHi, I am developer on psoc microcontroller.
I created a device with some feature like GSM and RS485 and external FRAM with I2C and so on...
Its worked well and it work for controlling irrigation in agriculture smarter by getting some function from server on GSM and control monitoring some sensor like TEMP and HUMIDITY on farm. Its so long to describe all of that....
I am doing this project with psoc5 and using FreeRTOS. It is so good without any hangup or effective from noise or any other destructive situation.
Now i have an important question that is so useful for me to reach FOTA on my device.(to change firmware of device to new)
I using example from cypress BLE_OTA_External_Memory_Bootloader and i know how can i creat 128 byte od meta data and how write structure on external memory FRAM true to update firmware by bootloader program. below is structure of OTA in that sample:
Image Status | Encryption Enabled | Application checksum | Image Size in flash rows | Number of the first flash row | External memory page size |
True(0x56) or False or Loaded(0x4C) App status | 0x00000000 show disable mode | Sum all of .cyacd program data in each row,then 2complementation | Number of row in .cyacd | In this example is 0x74 | show page of EEPROM (here is 64Kbyte) |
4byte | 4byte | 4byte | 4byte | 4byte | 4byte |
0x00000056 | 0x00000000 | 0x0000D23A | 0x00000010 | 0x00000074 | 0x00000040 |
Cause in my project i am using psoc5 and it has not struct like psoc4ble so i cant find how to change BLE_OTA_External_Memory_Bootloader to modified on psoc5.for example each row in psoc4ble is 128 byte but in psoc5 is 288 byte.
I try to build an easy sample code like LED blinking and adding Bootloadable on my project to create .cyacd file from project.It is build and i write on external memory like sample project.Calculate meta data by above structure in chart but i cant modified BLE_OTA_External_Memory_Bootloader to OTA true.
please tell me how can i do?
and if i need own bootloader program how can i create that to reach my purpose?
I am attach my prohect on psoc4BLE,plaese tell me how can i modified on psoc5lp?
thanks for attention...
Show Lessi have searched the cypress website, the developer community website for a c/c++ language manual
but have not found one.
please provide a link or provide a good reference
thank you
Show LessHi,
I'm trying to get my project to work and one of the problems is that data I write to a control register is not showing up on the pins the register is connected to (called DataOut in the project). While trying to figure it out, I noticed that my AddressBus and DataBus pin components don't show the pin assignments for each of their pins, even though all the pins are locked. They show the assignment for one of the pins, though.
I've attached the project. Can anyone advise me as to what I've done wrong? This is my first PSoC project, so it may very well be a N00B mistake. (There's debugging stuff in this project, like hard-coded writes to DataOut_Control and an OR gate forcing the DataBus' OutputEnable high. They're just part of my efforts to get this thing working.)
Thank you,
Bob
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