PSoC™ Creator & Designer Forum Discussions

Hi,

question is in the subject: is it possible write inline assembly for PSoC5? For PSoC3 is possible; there are several post about and it appears in documentation. But I found nothing about PSoC5

Thanks

I just started debugging a project made with creator 2.0 ang got the following errormessage

Device 'PSoC5 CY8C55*8AXI-060*' was successfully programmed at 12/07/2011 19:11:44.
Warning: Cannot set breakpoint: 'C:\Cypress\Another Testarea\TestPWM\TestPWM.cydsn\main.c:27'.  Encountered error (No hardware breakpoint support in the target.).
Error: dbg.M0015: Debugger exited unexpectedly during run.  Encountered error (Remote communication error: No error.)
 

Happy debugging?

Bob

Hello PSoC1 Developers

I'm Paul Clark, Marketing Manager for PSoC1 Development tools. I wanted to tell you all about a web-based training for those new to PSoC Designer. Learning how to use a new software package takes time and can present a challenge. We want to help you get started with PSoC Designer as quickly as possible. To kick start that process we are pleased to announce a pair of webinars targeted at first-time users. We are hosting live one-hour training sessions to introduce you to the tools, walk through a live demo, and tell you about other resources you can use to get the most out of PSoC.

The PSoC Designer webinar, for would-be PSoC 1 gurus, will be on Tuesday, May 31st at 8pm Pacific Daylight Time.

These are free events and registration is not required. To join, please navigate to https://cypress.webex.com/ at the specified time and use meeting number 925777058.

See you there!
Paul Clark
Product Marketing Manager
Cypress Semiconductor

Sometimes the programming somehow becomes much slower than normal speed. I have to restart my computer to make it normal. Restarting Creator does not fix the issue.

Hi,

I am studying the datapath on the PSoC Sensei blog at the moment, and I was wondering:

In Verilog, there are functions such as shifting, adding, etc.  These are the same functions

that the datapath provides. What then is the advantage of using the datapath? Is it that the

datapath is not used by the Verilog synthesizer? I.E. A pure Verilog implementation makes

less efficient use of the UDB, because it does not use the datapath?

Hugo

Hi all,

Is it possible to insert a custom build step in Creator 2.0? We can do this is every other IDE (MPLAB, Visual Studio, Eclipse, etc.)

The reason we need to do this is to generate some header files using a python script before the main compilation happens. The has to happen every time I do a build, which is why we need to have it as an automatic part of the build process.

Is it possible? If not, I would like to request it as a feature.

Many thanks

Hugo Elias

 Hi everyone.

I'm really getting to grips with PSoC Creator now and I am overall very pleased with it.

However I have 2 enhancement requests....

1. Can we get the ability to drag and drop files between groups (folders) in the Workspace Explorer? If I accidentally create a .h file in the 'Source files' folder I'd like to be able to drag it to the 'Header files' folder rather than have to delete/add it manually. That would be nice.

2. Can we get the option to automatically do a 'clear all' on the output window at the start of every compile? That would be nice also.

I hope someone from Cypress dev team is here to pass these comments onto the development team. Keep up the great work, PSoC creator is a real time saving dev tool.

-Kenny

Hi all,

When I place a digital component, and build the project, does that component generate a Verilog file ?  Is it possible to see this verilog file ?

Many thanks

Hugo Elias

Hi,

unfortunately when a  function is declared as reeantrant (with CYREENTRANT) it is not possible to watch local variables when debugging. Is there a magic trick to get some more insight into that?

Regards, Bob