PSoC™ Creator & Designer Forum Discussions
Hi,
Is anyone else having strange problems with PSoC Creator 3.0?
void main() is getting a warning that "return type of 'main' is not int". I pretty knew that when I wrote the program.
Also, as I move down the module, the first subroutine after main() is being treated as a function call or a prototype, I can't tell. It's full error, not a warning. It's says it's looking for a semicolon. I already have a prototype at the top of the module.
It doesn't seem to me that an upgrade to the compiler should cause hard errors on a program that would previously build with no errors or warnings.
Nick
Show LessIn the component datasheet there is this at beginning -
Level – IRQ source is sticky and remains active until firmware clears the source of the
request with an action (for example, clear on read). Most fixed-function peripherals have
level-sensitive interrupts, including the UDB FIFOs and status registers.
In the application note AN54460 a much better description -
LEVEL: This option routes the interrupt source through the direct path in the DSI interface, as Figure 9 on page 6 shows.
Select this option for interrupt sources that you want to be level-triggered, for example UDB-based Components such as
UART, SPI, timer, counter, and PWM.
Note Select only the LEVEL option for interrupts generated by UDB-based components such as UART and SPI. The reason is
that these components generate a level interrupt to indicate the UDB FIFO buffer status signal. The FIFO buffer, which is
4 bytes deep, is used to temporarily store data to be transmitted (Tx FIFO) or received (Rx FIFO).
I think datasheet should reflect the content of both, eg. sticky and the components that have to have a LEVEL
setting. Further a complete table of what components can use what interrupt settings.
Ideally Creator should flag when a user connects isr component to another component that
wants a LEVEL configured isr. No shortage of confusion over this.
Lastly one of the selections is DERIVED. Call me stupid but this leads me to always believe that
tool was smart enough to assign the right default for the component source for the isr. That is the
way it is described. Of course nothing could be further from the truth. So the word "DERIVED"
seems inadequately described in the isr component datasheet and above referenced ap note.
Maybe DERIVED should be YOUFIGUREITOUT 🙂
Regards, Dana.
Show LessHere is a roadmap that might be of interest. I have permission to post.
http://www.cypress.com/?rID=95697
Regards, Dana.
Show Less i have used a timer 32 bit to generate a timer of 1 sec .
i have kept interrupt type as terminal count.
set vc1 to 8 ,vc2 to 3 ,cpu clock as vc2 giving me clock of 1 Mhz
i have set the period to 1000000 which means it should generate an interrupt every 1 sec.
i have given the output of terminal count to port 0_0 and connected an led to pin 0 of port 0.
the following is the code i have written
my psoc designer uses hi tech compiler
#include
#include "PSoCAPI.h" // PSoC API definitions for all User Modules
#include "timer32.h"
void interrupt timer32_isr(void);
void main()
{
TIMER32_WritePeriod(0xf4240); //equivalent hex of 1000000
TIMER32_WriteCompareValue(0);
TIMER32_EnableInt();
M8C_EnableGInt;
TIMER32_Start();
}
void interrupt timer32_isr(void) @0x00 //as i have hitech compiler so used this way instead of using pragma directive
{
int count=0; //i have connected port 2 pin 0 to an led so it should glow whenever an interrupt gets generated
count++;
PRT2DR=count;
}
I have added
ljmp _timer32_isr
in the file timer32int.asm at the appropriate place these are the messages of error i get when i build the program
: 0: (500) undefined symbols: (error)
_TIMER32_EnableInt(output\timer2.obj) _TIMER32_WritePeriod(output\timer2.obj) _TIMER32_Start(output\timer2.obj) _TIMER32_WriteCompareValue(output\timer2.obj)
HI-TECH C PRO compiler averages 40% less code than this Lite mode
PRO may reduce your program size by 51 bytes
C:\PROGRA~1\CYPRES~1\PSOCDE~1\tools\make: *** [output/timer2.hex] Error 1
timer2 - 1 error(s) 0 warning(s) 05:13:52
i have referred many app notes as well as user module example projects but cant figure out whats wrong .
if any one can help??
When Placing RefMux I noticed it is named (as it should w/o user edit) "RefMux_1",
but code in datasheet names it as just "RefMux". That should be fixed to keep consistent
with rest of Designer. Also a note in datasheet about naming convention like I see in
so many other modules.
A suggestion, Designer incorporate a warning for any user module placed but never
started with Start() API. Would catch a lot of forum posts, and no small number of
CASEs I would bet.
Regards, Dana.
Show LessHi all,
I have a little problem with PSoC Creator 3.0. I can't find Analog No Connection component for PSoC 5LP design, there is no one in Alalog tab. But in documentation and cypress site it exists.
Where is I can find this component or I should download it separately from Creator?
Show LessHi,
I 'm new to PSoC and want to dig deeper into it So I bought a PSoC 4 pioneer kit as a starting point.
Now, I want to go for my 'real' first own design. This design uses a shift register component.
I've some questions:
1) It seems a counter is necessary to detect if the desired number of bits have been shifted, right?
2) I want to generate an interrupt if a new byte has been loaded from the FIFO into the shift register. I don't use the load input signal, but it seems that the load interrupt output can still be used for that purpose, right?
3) Is it possible to access the shift register status register (or the underlying UDB) by hardware? I want to detect if the FIFO is empty.
Regards,
Ralf
Show LessIn the PSOC 4 datasheet the CM input range for SAR is stipulated as
Vss to Vdda, should it be Vssa to Vdda ?
Also in TRM no discussion mentioned if SAR is a R ladder solution. Reason
I ask is the linearity specs are only speced for Vref >= 1 V, but if architecture
is R ladder one would think much lower Vrefs would still experience the same
linearity performance ? Or is this related to switch performance in the ladder
mux to decision comparator ?
Regards, Dana.
Show LessHi, I am trying to bring up a SDCARD useing Element14 design on PSOC 4, seeed shield, and having issues.
On that forum last post was Sept, there was a Mathew Buza and Sriram Vikraman Sithalakshmi doing most of the posts.
Does anyone know how to get in touch with either of these people ?
Regards, Dana.
Show Less