PSoC™ Creator & Designer Forum Discussions
Hi,
I`m wondering if there is GUIDRV_FlexColor for emWin library in psoc. I couldn`t find .C and .H file in that folder.
based on segger documentation, this driver can support RA8875 and that makes the life so easy for Psoc users. because most of chinese LCDs in the market which are cheap ofcourse, are using this controller. (http://www.segger.com/emwin-guidrv-flexcolor.html)
I found this driver for Emwin Pack from ST for their arm products. :
http://www.st.com/web/catalog/tools/FM147/CL1794/SC961/SS1743/PF259225?sc=stemwin#
here is two question:
1: does Emwin library from psoc support this driver? if so how can I have this driver files?
2: if not, is it possible to make the driver offered by ST work for Psoc? I think it will be fast job for your technical professionals who know deep about EmWin library and graphical interface.
Thanks
I find many had these CMSIS related issues raised in these forums but unfortunately I don't see any solution yet.
I need to use ARM CMSIS DSP Libs on pSoC5LP.
ARM provides these libs for all Cortex-M3 devices which one can get from :
It also provides a uvproject file to get all these Lib sources compiled on their MDK as well GCC software toolchains.
I have compiled these as a Lib file for GCC to be used for linking on pSoc Creator using the ARM's uVision IDE set to compile for GCC. The compilation and library creation were succesful.
Since Cypress supports mainly GCC Toolchain on pSoC Creator, I am trying to create an empty project on my pSoC5LP kit, using the Cypress provided GCC 4.7.3 Tools for software using a simple example provided for CMSIS DSP Lib 'arm_class_marks_example'
The linking of this CMSIS DSP Lib does not work on pSoC Creator and it gives undefined reference errors. It does not link these lib functions eventhough I have setup all the paths etc correctly.
I have included an archive of this project.
Appreciate any help in resolving these issues related to use of CMSIS DSP Lib on pSoC Creator.
Thanks in advance!
Show LessI have a problem on communication by SPI.
I observe the following behavoir: the transmission is OK when I send 2 bytes together, but when I send them one by one the last bit of the first byte is corrupted. There is a source code:
uint8_t reg1 = 0x25;
uint8_t Value = 0;
SS_1_Write(0);
// Write reg (reg1, value = 0x10)
SPIM_1_WriteTxData(reg1 & 0x7F);
SPIM_1_WriteTxData(0x10);
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer
SS_1_Write(1);
SS_1_Write(0);
// Read reg back
SPIM_1_WriteTxData(reg1 | 0x80);
SPIM_1_WriteTxData(0xFF); // dummy write to synchronize
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // readen reg value
SS_1_Write(1);
This code works fine. But when I move SPIM_1_WriteTxData(0xFF) in register value reading to place after reading dummy byte I receive wrong value:
// Read reg back
SPIM_1_WriteTxData(reg1 | 0x80);
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // dummy read to remove byte from buffer
SPIM_1_WriteTxData(0xFF); // dummy write to synchronize
while ((SPIM_1_ReadRxStatus() & SPIM_1_STS_RX_FIFO_NOT_EMPTY) == 0)
;
Value = SPIM_1_ReadRxData(); // readen reg value is WRONG
Then after some actions I found that the readen value is equal to value from register with address (reg1 - 1). This behavoir repeats for other register pairs.
Why does this happen?
I have configured SPIM component for mode (CPHA = 1, CPOL = 1), 8 Data Bits, MSB First. The external clock frequency is 2MHz. SS-pin is controlled by software.
Show LessI've created a custom component from a project file. The project had a SPI master block and two digital output pin (one for a manual SPI SS and another for an external device reset). When converting to a component (so I could use this particular arrangement in another design) I converted the digital output pins to digital output terminals as specified by AN57724. This meant that these two digital signals are not connected to anything anymore.
What is the correct way to convert a Digital Output Pin to something I can drive from software when creating a custom component? Do I have to create a Verilog module to achieve this, or is there something simpler?
Show LessRegarding HSIOM_PORT_SEL1, there is a detail shown -
HSIOM_SEL7 Selects pin 7 source.
Default: 0x0
0x0: EXT_VREF
Pin is used as external reference input for the SAR (must also set GPIO_PRT1.DM7= OFF).
No where can one find GPIO_PRT1.DM in the TRM, is that an older PSOC 1 reference ?
Regards, Dana.
Show Less1. How to include CMSIS library to the PSoC project?
Ans:
Here are the steps that needs to be followed to include the CMSIS library in your project:
1. Please copy the CMSIS library into your project's directory.
2. In workspace explorer(in creator), right click your project and select 'Build settings'->compiler->General. In the 'Additional include directories', add the path of the header files(include folder of CMSIS library).
3. In the same window, change 'preprocessor definitions' to 'ARM_MATH_CM3'.
4. In the same window, please go to linker->general and add 'additional libraries' as 'm'. Apply changes and close the window.
5. In arm_math.h file, add this line "include <device.h>".
6. Since PSoC 5 already contains part of the CMSIS library in "Generated_Source\cy_boot", we have to delete the following definitions.
In core_cmInstr.h, remove the definition of following functions:
__RBIT, __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, __CLREX.
In core_cmFunc.h, remove
__get_PSP, __set_PSP, __get_MSP, __set_MSP, _get_PRIMASK, _set_PRIMASK, _enable_fault_irq, _disable_fault_irq, __get_BASEPRI, _set_BASEPRI, __get_FAULTMASK, __set_FAULTMASK, _enable_irq, _disable_irq, _get_CONTROL, _set_CONTROL.
7. Right click source files (workspace explorer), select add->existing item->'and add all necessary source files that you are using'.
Now, the project will build.
Note: Step 6 is not needed in creator 3.0.
Hi,
After I install new PSoC Creator 3.0 SP1, the version of PSoC Programmer becomes 3.20.
However some scripts I wrote are based on 3.19.
How to rollback the PSoC Programmer version since independent installer cannot be found online?
Meanwhile I tried cypress update manager but it does not support rollback option for PSoC programmer.
Thank you.
Show LessIt was mentioned here that Cypress was working in PSoC7
http://www.eetimes.com/document.asp?doc_id=1281024&page_number=1
and a Japanese web page indicates it would be 2014 and would be a ARM M4.
Anyone has any idea what it is?
Show LessWhy do I get this message when I try to do a DMA Wizard on DMA_1 ? The build file is attached. Where should I actually paste these lines? I have tried various places and they get optimized out of existence when I do a Clean and Build.
I am trying to use the sequencing SAR to put analog data into the FIR filter where I will do a time-align on the two input channels. A secondary question is: how do I be sure that the next ADC starts with ADC_SAR input 0? I have to keep them time aligned. But this is a secondary question. Go back up to the first paragraph for my primary question. Why do I get the message below from the DMA Wizard and what do I do with it? My Workspace bundle is attached.
/* Variable declarations for DMA_1 */
/* Move these variable declarations to the top of the function */
uint8 DMA_1_Chan;
uint8 DMA_1_TD[2];
/* DMA Configuration for DMA_1 */
#define DMA_1_BYTES_PER_BURST 2
#define DMA_1_REQUEST_PER_BURST 1
#define DMA_1_SRC_BASE (CYDEV_PERIPH_BASE)
#define DMA_1_DST_BASE (CYDEV_PERIPH_BASE)
DMA_1_Chan = DMA_1_DmaInitialize(DMA_1_BYTES_PER_BURST, DMA_1_REQUEST_PER_BURST,
HI16(DMA_1_SRC_BASE), HI16(DMA_1_DST_BASE));
DMA_1_TD[0] = CyDmaTdAllocate();
DMA_1_TD[1] = CyDmaTdAllocate();
CyDmaTdSetConfiguration(DMA_1_TD[0], 2, DMA_1_TD[1], DMA_1__TD_TERMOUT_EN | TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);
CyDmaTdSetConfiguration(DMA_1_TD[1], 2, DMA_1_TD[0], DMA_1__TD_TERMOUT_EN | TD_INC_DST_ADR);
CyDmaTdSetAddress(DMA_1_TD[0], LO16((uint32)ADC_SAR_Seq_SAR_SAR_WRK0_PTR), LO16((uint32)Filter_STAGEA_PTR));
CyDmaTdSetAddress(DMA_1_TD[1], LO16((uint32)ADC_SAR_Seq_SAR_SAR_WRK0_PTR), LO16((uint32)Filter_STAGEB_PTR));
CyDmaChSetInitialTd(DMA_1_Chan, DMA_1_TD[0]);
CyDmaChEnable(DMA_1_Chan, 1);