PSoC™ Creator & Designer Forum Discussions
Hi,
I recently installed PSoC Creator 4.1 and see errors on startup:
An important piece of PSoC Creator has a problem and may not work correctly. Please restart PSoC Creator.
This error shows up when the following are being initialized:
CyDesigner.Common.Db.DeviceDb.Catalog.CyDcPlugin
CyDesigner.Common.ProjMgmt.CyPrjMgr
CyDesigner.Common.Db.CyS3Db.CyS3DbFactory
CyDesigner.Device.FitterPSoC.CyFitterPSoCPlugin
CyDesigner.Device.FitterFM.CyFitterFmPlugin
Additionally, when closing PSoC Creator, I get this error (and others which are similar):
This product had trouble launching on your computer. Technical error reason: An exception was thrown when trying to fully close plugin 'FM Fitter:a7614a5f-f176-4ec2-b000-98356a8f3dc8'. Exception Message: Object reference not set to an instance of an object..
I've tried to do a fresh reinstall several times, as well as uninstalling other PSoC packages. I had a version of PSoC Creator in the 3.X series working earlier in the week without these issues, so I'm not sure how to fix this. Does anyone have any suggestions?
I'm using macOS 10.12.6 (Sierra) with Parallels 13 and Windows 10.
Thanks!
Joey
Show LessHi,
I have built an ELF file using the startup code generated by the PSoC Creator Project, Using a custom Makefile. I have never been able to flash this ELF file via the PSoC Creator, since i cannot select the files in IDE.
Question 1. Is there a way this can be done via PSoC Creator?
I have tried seeing through build steps for generating the ELF file for this cypress part, The PSoC Creator uses this file CyComponentLibrary.a. Is it generated from the Source code generated by the PSoC Creator.?
Question 2. What does CyComponentLibrary.a file do? Do i always need it? Be it debugging or general BSP kinda thing?
Regards,
Vikram
Show LessI just updated Creator 4.1.
The device on my CY8CKIT-042 Pioneer kit will not program. The target shows as "CMSIS-DAP/248683 -->PSoC4200 CY8C4245AX*-483", protocol = SWD. Prior to the update the target was the KitProg. When I go to the device manager, the KitProg does not appear in the COM port section.
Very disconcerting. This was working perfectly yesterday before I updated Creator 4.1 and now it's not working at all.
I have just now uninstalled update 1 and re-installed Creator 4.1.0.2686. The KitProg is still not showing up.
Any suggestions?
Show LessI'm having success using this software, but I don't understand the value the "GetPorts" command returns. What determines the value? Is it solely determined by the PSOC? From what I can tell it doesn't appear to be related to the silicon ID.
Typically I'll get a value of "KitProg/0E22154D00135400", but to use the OpenPort command I have to add a space and a period. I'm not sure why I have to do that either. Any clarifications would be appreciated.
The goal of this exercise is to automate programming of multiple devices, so its a key requirement to understand how this port stuff works.
Thanks!
Fre
Show LessI received a PSoC Creator project from a coworker and all the application files are locked. E.g. main.c has an lock icon next to its name in the tab and is not editable. How can I disable the file lock? I tried saving the project under a new name but this didn't help form me (answer in this forum to a similar case). When opening the project file I it prompted:
Log: prj.M0170: A workspace is being opened in a different version of this tool than it was last saved in. In order to preserve the ability to open the workspace in that different version of the tool, a backup has been created. It is located at 'C:\Users\..\._3.3_SP2.zip'.
I'm running PSoC Creator 4.0 Update 1 on Win 8
How can I get the files editable again?
Show LessHi,
I want blinking the LED using PWM Component. I am connecting LED port 2.1 and frequency 100 Hz . LED is not Blinking . Is there any specific pin for pwm in Psoc cy8ckit - 059 LP. I am waiting for your reply could you and please let me know as soon as possible. Thanks.
Show LessHi Cypress,
See attached screenshots. It would be great if you added a feature so that the system settings would change, depending if it was a Debug or a Release build.
For Debugging, I want to allow SWD and the chip protection must be set to Open. For Release, Debug Select should be set to GPIO and Chip Protection must be set to Protected (for obvious reasons).
The same goes for the Bootloadable block. For debugging, it should use the HEX file in the Debug directory and for release, it should use the HEX file in the Release directory.
The manual process of changing the settings (in the bootloadable AND bootloader) is error-prone and I could make a mistake and release a product without the protection bits set 😞
Thanks in advance,
Pieter
Show LessPlease welcome another four (four!) installments into the super primitive category, this time with the intent of getting you up and running with a datapath faster and easier than ever before. These four datapath super primitives eliminate 95% of the busywork associated with developing for a datapath and get you trying, testing and creating with PSoC’s powerful UDB datapaths in no time at all.
These datapath super primitives allow you to start designing with an 8, 16, 24 or 32 bit datapath, preconfigured and bristling with features to help you try out new ideas and debug when things go wrong. These super primitives provide you with a readymade component symbol, configurable component parameter (A0, A1, D0, D1 initializations right in the customizer, FIFO configuration of status reporting and easy access to the FIFO single buffer mode as well as optional debugging hardware signals and reset). Premade API files simplify component development with a header file containing all the necessary datpath registers, pointers, masks, modes and shifts already defined for you, as well as a C file that provides a Start() API ready to go with all the features you enable in the customizer.
Excited? I’m just getting started. These super primitives also include a skeleton verilog file, with all the necessary code to get started already included such as standard inputs and outputs, component parameters, a state machine and a preconfigured datapath of your choosing (8, 16, 24, or 32 bit). The preconfigured datapaths are already chained for you so they “just work” and include shifting setups for left shifts and arithmetic right shifts. The datapaths are also moved into the merge region of the verilog file, so when you add inputs and outputs to your symbol, simply re-generate your verilog file, and the new inputs and outputs are added for you automatically, with nothing lost!
I can tell you are ready to start using these super primitives, but I am not done packing the awesomeness into these components. These super primitives also come packaged with a component debug capability file, giving you incredibly easy access to the working registers of the datapath (A0, A1, D0, D1, even the FIFOs in single buffer mode), simplifying debug and reducing the headaches associated with learning the datapaths. And to top it all off, you also get a DMA capability file, giving the DMA wizard easy access to all your important registers, simplifying the setup of getting data into and out of your datapath component.
With these components, all you need to do to start using a datapath is import the desired super primitive, point the Datapath configuration tool at the premade verilog file, configure your datapath and write your verilog to control it and GO!
Please check out the included README PDF for detailed instructions on using the super primitives.
Show LessI want to design a component with an underlying 32-bit wide Datapath. The 8-bit module provided in the librara has got both a .pi (direct input) input and a .po output, the automatically selected 32-bit wide DataPath has got none of them.
What actions do I have to take to get the 32-bits .pi ?
Bob
Show LessI used to be able to build this simple bootloadable app (Top Design only has a SPI slave, a GPIO input pin, and a Bootloadable component) but all of a sudden I get:
Log file for this session is located at: C:\Users\Jean.Boucher\AppData\Local\Temp\PSoC Creator-000.log
Warning: Firmware is not fully loaded and device cannot be detected. Please reconnect - "MiniProg3/1614BB00109C".
--------------- Build Started: 08/14/2017 16:57:28 Project: ManufacturingApp, Configuration: ARM GCC 5.4-2016-q2-update Release ---------------
cydsfit.exe -.appdatapath "C:\Users\Jean.Boucher\AppData\Local\Cypress Semiconductor\PSoC Creator\4.1" -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\Users\Jean.Boucher\Indigo\rc2.0.0_PSoC_IRQ_Btldr\device\safety\project\ManufacturingApp.cydsn\ManufacturingApp.cyprj -d CY8C5268LTI-LP030 -s C:\Users\Jean.Boucher\Indigo\rc2.0.0_PSoC_IRQ_Btldr\device\safety\project\ManufacturingApp.cydsn\Generated_Source\PSoC5 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
Elaborating Design...
HDL Generation...
Synthesis...
Tech Mapping...
Analog Placement...
Analog Routing...
Analog Code Generation...
Digital Placement...
Digital Routing...
Bitstream Generation...
Error: pft.M0101: Unable to generate metadata file:
Dependency Generation...
Cleanup...
Error: fit.M0050: The fitter aborted due to errors, please address all errors and rebuild. (App=cydsfit)
--------------- Build Failed: 08/14/2017 16:57:36 ---------------
--------------- Clean Started: 08/14/2017 16:57:46 Project: ManufacturingApp, Configuration: ARM GCC 5.4-2016-q2-update Release ---------------
Deleting file ".\ManufacturingApp.rpt"
--------------- Clean Succeeded: 08/14/2017 16:57:46 ---------------
--------------- Build Started: 08/14/2017 16:58:14 Project: ManufacturingApp, Configuration: ARM GCC 5.4-2016-q2-update Release ---------------
cydsfit.exe -.appdatapath "C:\Users\Jean.Boucher\AppData\Local\Cypress Semiconductor\PSoC Creator\4.1" -.fdsnotice -.fdswarpdepfile=warp_dependencies.txt -.fdselabdepfile=elab_dependencies.txt -.fdsbldfile=generated_files.txt -.fdsreffile=referenced_files.txt -p C:\Users\Jean.Boucher\Indigo\rc2.0.0_PSoC_IRQ_Btldr\device\safety\project\ManufacturingApp.cydsn\ManufacturingApp.cyprj -d CY8C5268LTI-LP030 -s C:\Users\Jean.Boucher\Indigo\rc2.0.0_PSoC_IRQ_Btldr\device\safety\project\ManufacturingApp.cydsn\Generated_Source\PSoC5 -- -yv2 -q10 -ygs -o2 -v3 -.fftcfgtype=LE
Elaborating Design...
HDL Generation...
Synthesis...
Tech Mapping...
Analog Placement...
Analog Routing...
Analog Code Generation...
Digital Placement...
Digital Routing...
Bitstream Generation...
Error: pft.M0101: Unable to generate metadata file:
Dependency Generation...
Cleanup...
Error: fit.M0050: The fitter aborted due to errors, please address all errors and rebuild. (App=cydsfit)
--------------- Build Failed: 08/14/2017 16:58:21 ---------------
Not very helpful error message. Seems like something should follow the ":" at the end of it. I can't figure-out what's suddenly causing this. Updating to PSoC Creator 4.1 Update 1 (4.1.0.3210) didn't help. Does the same for Debug configuration. Has anyone else seen this error?
Show Less