PSoC™ Creator & Designer Forum Discussions
Hi Guys,
Where can we find Cypress PSoC community components ?
(there was a validated and unvalidated components)
The old Cypress link is broken.
Have a nice day !
Péter
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I follow the instructions presented in point 5.8 of CY8CKIT-037 PSoC 4 Motor Control Evaluation Kit Guide, but I can't see the display data on the BCP chart window .
The port connection status change from Connected to Waiting. Step in attached a capture of the Bridge Control Panel (BCP).
Can you help me please! I need to monitor the motor state with the CY8CKIT-037 Kit
Show LessHi,
I am trying to compile and run the UART Bootloader Host source in Visual Studio 2017.
The source compiles ok and runs but when I select the "Bootload" button I get the following error in the "backgroundWork_DoWork()" routine...
System.BadImageFormatException: 'An attempt was made to load a program with an incorrect format. (Exception from HRESULT: 0x8007000B)'
The pre-compiled exe runs fine but I cannot run it from source
Show LessI have a project based on CE220960, and I am trying to debug some issues with my custom App0, but the uart printf is not working. After spending a bunch of time trying to figure that out, I realized the printf in App0 of the original example doesn't work either. Uart printf works fine in the other apps.
Anybody solve this issue?
I am using Creator 4.4, PDL 3.1.2, on CY8CKIT-062-BLE.
Josh
Show LessHello,
Our developers use PSOC Creator to develop our device software. Is it possible to use PSOC Creator with Github/Bitbucket or other source code repository?
Thanks is advance from a PSOC Newb.
Tom
Show LessGood morning,
I have simple question: how not to program selected section of Flash? I added NOLOAD attribute to linker script in both cores, but it does not work.
/* Emulated EEPROM Flash area */
.cy_em_eeprom (NOLOAD) :
{
KEEP(*(.cy_em_eeprom))
} > em_eeprom
I am working on CY8C6247BZI-D34 microcontroller.
Yours faithfully,
akrupaa
Hi,
First of all I have confirmed using Bridge Control Panel that I can do "List" and Bridge Control Panel is able to find my Slave device and show the 8bit and 7 bit address correctly (0xC2 for 8-bit or 0x61 for 7-bit respectively).
Now I am trying to use Python to interact with MiniProg3 to do the same thing.
I started from the example file: "C:\Program Files (x86)\Cypress\Programmer\Examples\Protocols\I2C\Python_Ex\Python_Ex.py" file.
There are codes that is suppose to scan the I2C bus and get the slave address:
hResult = pp.I2C_GetDeviceList()
devices = hResult[1]
I expect that the contents of the 2nd item in hResult that came from pp.I2C_GetDeviceList() to be some sort of string or character or integer that is a representation of my slave device address.
However the contents of hResult is like this (I am using Spyder3 on Anaconda):
In [19]: hResult
Out[19]: (0, <memory at 0x0000025D302D9708>, '')
As can be seen above, the 2nd item in hResult is a "memoryView" object.
Question: what am I doing wrong?
How is this <memory at 0x0000025D302D9708> memoryView related to my Slave device address?
Please help. Thank you.
Show LessI started a discussion thread that had gotten locked due to inactivity.
New-custom-Counter-component-feature-set-ideas
I'd like to continue the request for new component features.
I current have a new custom component that is a special counter. I haven't officially published it yet.
The intent of this new counter is to provide additional useful features while at the same time only using the same PSoC resources as other Infineon counters currently available.
I have a working version with a number of special features. It needs documentation (datasheet) and a good demo project to display most of its capabilities and the API calls to access them.
Here's a quick overview of its current features:
- Up-counter
- Settable width 1 to 32 bits.
- Count value available by HW-routable outputs, DMA or CPU.
- Settable Unsigned or signed counting (design-time)
- Settable reset value (run-time)
- Settable increment value. (run-time) (With increment values > 1, some counts are skipped. Therefore the desired initial and maximum values may be readjusted for the count to work properly.)
- Settable initial starting value (run-time)
- Settable maximum value (run-time)
- Terminal count output
- Next Count available output (intended for DMA, ISR or HW signaling downstream)
- Reset input.
Possible enhancements:
- Settable capture input with a 4-byte FIFO capture buffer. (run-time)
- Settable Up/Down count (design-time)
- Up/Down count input (run-time)
Any other recommendations?
I'm hoping to publish this new counter by the end of June.
Show LessI'm checking out the Creator software for compatibility with Windows 11 AND Windows 10 to make sure that my students will have an easy installation and useage. In general, the students will have either Win 11 or Win 10 on the laptops and I'd like to use a common version for both operating systems.
We currently use Creator 4.2 -- I'm concerned that this version will have issues in Windows 11 (works fine in Win10). We could switch to Creator 4.4 if it works in Win11, and also in Win10.
Let me know your experience - positive or negative.
Thanks.
Show LessHi,
I've created a new custom counter component that I haven't officially published yet. I'm waiting to see if there are any good feature add suggestions.
The component currently functions as a simple up-counter with the following features over the standard counter component:
- A settable maximum value. (This is virtually identical to the period value)
- A settable reset value. This allows from non-'0' reset values to be used. This is useful to create 'signed' value outputs where the reset value can be set to -32768 and the maximum value to 32767 so that the counter will increment from the lowest signed 16-bit value through the highest signed value.
- A settable increment value. This allows for stepping the count value in values greater than 1. For example, the counter is 32-bits in width. If I want to count from 0 to (2^32)-1 with a 48MHz count clock, it would take 89.5 seconds to complete. Using a increment of 2 would cut this down to 44.8 secs.
- The current counter value doesn't require a two-read operation as with the standard counter. The counter value is directly readable for DMA access.
Your suggestions for additional features are welcome.
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