PSoC 5LP SPI Master

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cross mob
lma
Level 3
Level 3
50 sign-ins 10 replies posted 5 questions asked

I want to use a Kit-059 to control a 16x16 cross-point switch Analog Devices AD75019, using the SPI master component. The AD75019 takes 256 bits of serial data clocked in a CPHA= 0, CPOL=0 format.

I am examining  SPIM_Example Project 1.10 to get an understanding of using am SPI as a master.  I am also looking at documentation component data sheets Serial Peripheral Interface (SPI) Master 2.50, Direct Memory Access 1.70,  ap notes  AN52705 and AN84810, and the data sheet for the AD75019.

questions:
1) this section of the example main.c:

/* DMA Configuration for DMA_TX */
#define DMA_TX_BYTES_PER_BURST            (1u)
#define DMA_TX_REQUEST_PER_BURST     (1u)
#define DMA_TX_SRC_BASE                               (CYDEV_SRAM_BASE)
#define DMA_TX_DST_BASE                               (CYDEV_PERIPH_BASE)

The four DMA... are used in the DMA transmit configuration. I take it that 1u means 1 byte, unsigned integer.  
Where are CYDEV_SRAM_BASE and CYDEV_PERIPH_BASE defined? These become the high order address bytes for the transmission data. Are the addresses defined by the Creator at build time? Which Spike gets used?

 

2) In the DMATxConfiguration function, this line:
CyDmaTdSetAddress(txTD, LO16((uint32)txBuffer), LO16((uint32) SPIM_TXDATA_PTR));

sets up the transaction descriptor. I take it that LO16((uint32)txBuffer) is the low 16 bits of the address of the transmit buffer - apparently this construction creates a pointer (or when it gets transferred to the function CyDmaTdSetAddress, it is seen as a pointer. Likewise LO16((uint32) SPIM_TXDATA_PTR) - but where is SPIM_TXDATA_PTR defined?

 

3) in the main function:
CyDmaChEnable(txChannel, STORE_TD_CFG_ONCMPLT);

while (0u == (SPIM_ReadTxStatus() & SPIM_STS_SPI_DONE))
{
}

Does enabling the DMA channel cause it to transmit? If not, what does?
Where can I find the various codes, like STORE_TD_CFG_ONCMPLT, and what they mean/do?
The while loop continues through each 8 bytes of the buffer, until both SPIM_ReadTxStatus()  and SPIM_STS_SPI_DONE are 1.

 

4) At the beginning of main.c, the data buffers are declared:
/* Data buffers */
uint8 txBuffer [BUFFER_SIZE] = {0x0u, 0x01u, 0x02u, 0x03u, 0x04u, 0x05u, 0x06u, 0x07u};
uint8 rxBuffer[BUFFER_SIZE];

How does the information in the transmit buffer (looks like octal(?) or hex(?)   bytes 0 through 7) lead to the expected results per  the SPIM example pdf? It is clear that Master RX data: is written directly to the LCD display.
Expected Results
The LCD should display:
Master Rx data:
090A0B0C0D0E0F

 

5) Since I only want to transmit the data, as the cross-point switch is not an SPI device, but it does take serial data clocked in, in the same format as SPI ( CPHA= 0, CPOL=0 format.). I don't need the MISO input. The component sheet says it needs to be connected, but to what?
Is it okay to ground it, or tie it high? Data lines selection "Bi-directional" looks more like what I need: DATA and CLOCK. Since there is only one (not quite) SPI device, I don't need the Slave Select, and plan to leave it unconnected.  

I expect a few more questions, but this should help move me along.

Thank you

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4 Replies
PandaS
Moderator
Moderator
Moderator
250 replies posted 100 solutions authored 5 likes given

Hi @lma ,

1)In main.c the below macros are definitions required for DMA configurations:

/* DMA Configuration for DMA_TX */
#define DMA_TX_BYTES_PER_BURST            (1u)       // -> 1 byte will be sent per burst
#define DMA_TX_REQUEST_PER_BURST     (1u)       // -> Request per burst is also of 1 byte
#define DMA_TX_SRC_BASE                               (CYDEV_SRAM_BASE)       /*-> These are the SRAM's starting address, this device specific detail and is defined in cydevice.h header file. Its the source address from where the DMA would transfer data*/
#define DMA_TX_DST_BASE                               (CYDEV_PERIPH_BASE)  /*->  This is also device specific, indicates the starting peripheral address of the device and is also defined in cydevice.h. This acts as the destination address for DMA Controller. */

 

2) In the DMATxConfiguration() function, the CyDmaTdSetAddress() function sets the source and destination addresses in Transaction Descriptor. This function has 3 parameters TD Handle, source address and destination address .  The txBuffer[] is an array data type and txBuffer points its address, SPIM_TXDATA_PTR is nothing but the address of SPI Transmission data register which is defined in SPIM.h.

 

3) The CyDmaChEnable(txChannel, STORE_TD_CFG_ONCMPLT) enables the DMA channel and waits for the SPI to send a Tx Request. This will trigger the DMA to start the transfer. And once the SPI Transfer is complete,  the control jumps out of the blocking while loop.

 

4)  uint8 txBuffer [BUFFER_SIZE] = {0x0u, 0x01u, 0x02u, 0x03u, 0x04u, 0x05u, 0x06u, 0x07u};

This is a way to initialize variable, it is equivalent to {0,1,2,3,4,5,6,7}. When transmitted byte wise, first 0 will be transferred followed by 1, 2,3 and so on.

 

5) To advise you better could you please describe your application in detail and requirements. Do you just want to interface the AD75019 with PSoC5. Is using DMA necessary for the application.

 

Some useful tips:

If you want to know more about a Macro or function, simply right click on the highlighted part and choose Go to declaration / Go to Definition.

PandaS_0-1654767862131.png

 

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lma
Level 3
Level 3
50 sign-ins 10 replies posted 5 questions asked

1) So CYDEV_SRAM_BASE and CYDEV_PERIPH_BASE are defined in cydevice.h, which is device specific, and added at build time based on the specific PSoC procvessor specified for the project. In short, they are added in by PSoC Creator and I don't actually need define them.

2) Likewise SPIM_TXDATA_PTR is provided by PSoC Creator and I don't actually need define it.

3) "...waits for the SPI to send a Tx Request...." okay, but what causes SPI to send the TX request?
Is it buried in the while statement: while (0u == (SPIM_ReadTxStatus() & SPIM_STS_SPI_DONE))?
Does SPIM_ReadTxStatus()  or  SPIM_STS_SPI_DONE)) cause SPI to send the transmit request?

4) SPI transmits 0, 1, 2, 3, ... , 7. How does that become 090A0B0C0D0E0F at the LCD display?
How does the transmission of 8 bytes become 14 characters at the display?

5) I want to interface PSOC5 with AD75019. The gadget will be used to simulate the passing of a train,
wheel by wheel, by 8 sensors. the signals to represent the wheels are input to the AD75019. The outputs
show each wheel passing the 8 sensors on each rail, hence 16 outputs. Timing is set depending on
the speed of the train. The output of the AD75019 looks like shifting a an analog signal through a
an analog shift register.

tips) I've looked at the declarations and definitions. They don't really help, as I don't really know
what I'm looking at.  Is there some documentation on said definitions?
I would prefer the Kit-059, as I have become somewhat familiar with it, and have some on hand.
If there is a good way to do this without DMA, that works.
I am tied down to the AD75019, as it is the only cross-point switch I have found with the appropriate voltage range.

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lma
Level 3
Level 3
50 sign-ins 10 replies posted 5 questions asked

the example considers the transfer of 1 byte.

I need to transfer 256 bits, 1 bit for each switch of the crosspoint switch.

how do i specify 256 bits, or 32 bytes? that is, what kind of variable will hold 32 bytes?

how do I line them up to be transferred via DMA and SPI? 

i am not getting enough from the ap notes, etc to know which way to go.

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PandaS
Moderator
Moderator
Moderator
250 replies posted 100 solutions authored 5 likes given

Hi @lma ,

Thread was locked due to inactivity for long time, you can continue the discussion on the topic by opening a new thread with reference to the locked one. The continuous discussion in an inactive thread may mostly be unattended by community users.

Threads related to this thread, for reference:

1. https://community.infineon.com/t5/PSoC-5-3-1/Kit-059-as-SPIM/m-p/364667#M47470

2. https://community.infineon.com/t5/PSoC-5-3-1/Error-mpr-M0022/td-p/364491

 

Thanks, and regards
Sobhit Panda
Infineon Technologies 

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