PSOC 6 and BLDC kit routing problems

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user_2312961
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Hi to everyone

I'm looking for a FOC motor control using PSOC 6.

I've using CY8CKIT-042 kit and the CY8CKIT-062-BLE board.

The problem is that when i'm using the FOC sensorless example, changing the pins (that are designed using PSOC 42 pioneer kit) to CY8CKIT-062-BLE pins (thinking on arduino compatible pin), i have an error (Unable to place component "\Opamp_B:cy_mxs40_opamp\". Either the design is bigger than this chip can handle, or the design is over-constrained and there are not enough resources to satisfy the constraints.)

I have tried many pin configurations, but they all cause problems and the code does not compile. Also i'm changed the code to compatibility with PSOC 6. Can you help me with that?

Here is my code

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hi,

I have modified the your project for the routing to be possible. On the analog side, I had to change some of the pins so that it did not hinder the placing of Opamps. At the digital side I had to change the pins as OE is enabled for the GPIOs. It had to be made sure that the DSI route is used for these digital pins. For this  purpose, directives are placed(CYDWR->Directives) for the blocks to be used to be fixed while code generation. The final project with routing issues resolved is attached.

Best Regards,
Vasanth

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hi,

PSoC6 has some restrictions on pin selection depending upon the analog peripheral it is connected to. For ex. port10 is recommended for ADC input. Port 9 has dedicated input and output pins of opamp.  These are listed in the Hardware Design Considerations application note. Could you kindly check the application note and make sure all the recommendations are met. 

 

Best Regards,
Vasanth

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Vasanth
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250 sign-ins 500 solutions authored First question asked

Hi,

I have modified the your project for the routing to be possible. On the analog side, I had to change some of the pins so that it did not hinder the placing of Opamps. At the digital side I had to change the pins as OE is enabled for the GPIOs. It had to be made sure that the DSI route is used for these digital pins. For this  purpose, directives are placed(CYDWR->Directives) for the blocks to be used to be fixed while code generation. The final project with routing issues resolved is attached.

Best Regards,
Vasanth

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