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Greetings- I have a PSoC5 design in Creator 4.3 with 2 1/2 Duplex RS-485 Uarts. They were 1st placed with internal clocks @ 9600Baud.
We need to change bit rates periodically during execution, so I changed the UART configurations for external clocks and added the clock components as customary. The design built fine, but never again. Any attempts to change either UARTS configuration now will fail to build, with "can't fit into 24 UDB blocks", and the sjplacer.exe failure (0x0000000B). Even reverting the schematic back to internal UART clocks, and deleting the clock components will cause the builder to fail.
Enough resources were available for the first build. I don't think they are getting released when no-longer needed by the design. We are tracking changes with GIT, and there seems to be an increasing number of keys being created, but very seldom see them deleted (only tagged as visible false)
"Clean and Build" does not fix this.@
Thanks
Ken Ayre/Sielox
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Hi Ken Ayre,
Please note that 2 UARTS with external clock would easily fitted in PSoC 5668 device. Please find the attached project.
Are you using any other UDB components in your project other than UDB UARTs? If yes, they may be occupying more space. if possible, please attach your project so that we can try to build at our end and check? You can remove the code from the project and then send it for us.
Thanks
Ganesh
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You misunderstand- the project will build at first- I know we have room for 2 RS485 uarts, and check I can check resources and we're using < 85% of the UDB resources. I also can report we are only using 6/8 clocks.
How do I report a bug? Where attempting to reconfigure the UARTS after the first build fails after changing to external clock. I can build it with the external clock once before something is corrupted.
This is commercial product and code under development, so no parts of it can be shared in a forum setting.
How do I escalate this to tech support?