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PSoC™ Creator & Designer

Level 9
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Level 9

I started a discussion thread that had gotten locked due to inactivity.


I'd like to continue the request for new component features.

I current have a new custom component that is a special counter.  I haven't officially published it yet.

The intent of this new counter is to provide additional useful features while at the same time only using the same PSoC resources as other Infineon counters currently available.

I have a working version with a number of special features.  It needs documentation (datasheet) and a good demo project to display most of its capabilities and the API calls to access them.

Here's a quick overview of its current features:

  • Up-counter
  • Settable width 1 to 32 bits.
  • Count value available by HW-routable outputs, DMA or CPU.
  • Settable Unsigned or signed counting (design-time)
  • Settable reset value (run-time)
  • Settable increment value. (run-time)  (With increment values > 1, some counts are skipped.  Therefore the desired initial and maximum values may be readjusted for the count to work properly.)
  • Settable initial starting value (run-time)
  • Settable maximum value (run-time)
  • Terminal count output
  • Next Count available output (intended for DMA, ISR or HW signaling downstream)
  • Reset input.

Possible enhancements:

  • Settable capture input with a 4-byte FIFO capture buffer. (run-time)
  • Settable Up/Down count (design-time)
  • Up/Down count input (run-time)

Any other recommendations?

I'm hoping to publish this new counter by the end of June.

"Engineering is an Art. The Art of Compromise."
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