Changing TCPWM Counter to 32 bit seems to break another interrupt

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JiSt_4468101
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I'm using PSoC Creator 4.2, with a CY8CKIT-062-WIFI-BT.  I started with example CE221118 - TCPWM Event Counter, and started modifying things to experiment with something.  I added a TCPWM with 16-bit resolution, divide by 1, continuous, up-count, 65535 period no interrupt, but the default Capture mode setup (capture input is disabled).  No other inputs on that new TCPWM.  I'm clocking this from a 1kHz clock.  I initialize, enable and start the new TCPWM in the firmware, and things run as expected. (There is an interrupt generated by the sample's 'TIMER' component, that I modified to trigger every second, vs every 10 seconds...)  The interrupt handler triggers as expected, the example's UART outputs info every second, etc - all is good.

If I modify the newly-added TCPWM to be 32-bit instead of 16 bit, things compile fine, upload to the device fine, the example's first line of output to the UART goes fine (just a 'UART Initialized' type of statement), but then crickets...  The example's 'TIMER' TCPWM no longer seems to trigger the interrupts, and there is no subsequent output to the UART.

If I go into debug mode, and put a breakpoint in the loop, it repeatedly gets hit - so its not like the whole processor is wadded up - it just seems that somehow setting this new TCPWM to 32-bit is interfering with the interrupt of another TCPWM altogether.  If I set the new TCPWM back to 16-bit mode, all works fine again.  I've tried changing the period of the new TCPWM's period to various values in both 16 and 32-bit mode, including the base example's 32768, as well as 65535, and 4294967295 (only when in 32-bit mode), and the period value doesn't affect whether it works in 32-bit mode - if it's in 32-bit mode, things are broken.

I'm fairly new to all of this, and am not yet 100% clear on what you can and cannot hook up to TCPWM clock and count inputs (I may post that as another question...), but I don't think I'm doing anything strange with this, and am kinda baffled. (Ok, in truth, completely baffled... 🙂

I'll attach my project here, in case nobody is able to give me the noob slap upside the head with an obvious answer, and is willing to see if they can reproduce the problem. 🙂

Thanks for any assistance!!

Jim

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ShipingW_81
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500 replies posted 250 solutions authored 250 replies posted

I have not found the exact root cause for this issue yet. However, a workaround is to set both counter TIMER and millis_TCPWM as 32 bits resolution. Then ISR for TIMER gets triggered normally.

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ShipingW_81
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

I have not found the exact root cause for this issue yet. However, a workaround is to set both counter TIMER and millis_TCPWM as 32 bits resolution. Then ISR for TIMER gets triggered normally.

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