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PSoC™ 6

John_K
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Is it possible to disable IMO in PSOC6 (assuming that clock HF clocked is switched to ECO like ALTHF)?

I didn't see any API (in PDL) that allows shutting it down.

  I think it was possible in PSOC4, and we did this for lower power (when running off ECO).

 

 

 

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Ekta
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Hello @John_K ,

In case of PSoC 6 the IMO will be automatically disabled when moving the device to low power mode (Deep Sleep and Hibernate) as can be seen in the image attached:

Ekta_0-1626443299485.png

It is possible to disable IMO by setting the Enable bit of the CLK_IMO_CONFIG register to low but it is not recommended to do so. This bit must be high at all times for all functions to work properly. Hardware will automatically disable the IMO during HIBERNATE and XRES. It will automatically disable during DEEPSLEEP if DPSLP_ENABLE==0.

Thanks 

Ekta

 

 

 

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Ekta
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Hello @John_K ,

In case of PSoC 6 the IMO will be automatically disabled when moving the device to low power mode (Deep Sleep and Hibernate) as can be seen in the image attached:

Ekta_0-1626443299485.png

It is possible to disable IMO by setting the Enable bit of the CLK_IMO_CONFIG register to low but it is not recommended to do so. This bit must be high at all times for all functions to work properly. Hardware will automatically disable the IMO during HIBERNATE and XRES. It will automatically disable during DEEPSLEEP if DPSLP_ENABLE==0.

Thanks 

Ekta

 

 

 

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Len_CONSULTRON
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John_K,

As Ekta indicated, it would be problematic to disable the CPU's clock while the CPU is running.

This is why the IMO can be disabled during low power modes because the CPU is disabled as well.

If you want the CPU to still be running while in a lower power mode, you can reduce the IMO frequency and turn off any other high speed clocks like PLLs that might be running.

If you're using a PSoC6 with a BLE, you might want to consider turning it off.

In general, 90% of the current consumption in an digital IC is consumed in switching events.  The higher the frequency in circuits, the more switching events.  That is why there is usually a CPU current spec that is based on the CPU frequency being used.  (ie.  100uA/MHz.  Therefore CPU clocking at 100MHz = 10mA.)

Len
"Engineering is an Art. The Art of Compromise."
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John_K
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Thanks Ekta,

I understand that the IMO  will  be automatically disabled and enabled into and out of sleep.

 

Len,

 

It would  not be problematic to disable the IMO, after the clock is switched to a different source (like ECO in this case). There are cases where we need to run on ECO for high tolerance use cases and then switch back. This was possible in Psoc4, we just had to manage which h/w blocks would and wouldn't work. We saved a bit of power by shutting it down while we were running on ECO.

Looks like standard practice from Infineon for PSoc6 is that it stays enabled.

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Len_CONSULTRON
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John_K,

You are correct, you can't disable or lower the IMO frequency on the PSoC6.

Doing a little research i found the following:

The IMO does have an ENABLE bit setting.

Consult the PSoC6 Register TRM at : https://www.cypress.com/file/421411/download

Look at page 552; Section 9.1.17 CLK_IMO_CONFIG; bit 31.

Apparently you may be able to disable the IMO however two notes are provided:

Master enable for IMO oscillator. This bit must be high at all times for all functions to work properly.
Hardware will automatically disable the IMO during HIBERNATE and XRES. It will automatically
disable during DEEPSLEEP if DPSLP_ENABLE==0.

It might be worth a try at development.   An early test will determine if some sub-function stops working and what the difference of current will be with and without.

Len
"Engineering is an Art. The Art of Compromise."
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