PSoC™ 6

I'm using a a CY8CKIT-062-BLE with the EINK display.

I have two projects using this kit.

One works to update the display the other does not.

On the one that doesn't work (link) it complains about a code line using:

LCD_GetDisplayBuffer().

The linker complains and aborts:

.\CortexM4\ARM_GCC_541\Debug\main_cm4.o: In function `UpdateDisplay':
C:\Users\lpoma\Desktop\SineGen_Audio\SineGen_Audio_EINK_062-BLE.cydsn/main_cm4.c:174: undefined reference to `LCD_GetDisplayBuffer'
collect2.exe: error: ld returned 1 exit status
The command 'arm-none-eabi-gcc.exe' failed with exit code '1'.

I compared the build specs of the two projects and the issue is not immediately apparent.

Apparently I'm missing a em-Win library reference some where.

I can use some expert help here.

Thanks in advance.

Hi 

I made custom BSP for CY8C6244AZI-S4D93.

I was trying to add DAC configuration using MTB but I think there are some problem with connection verification.

According to below diagram, direct output of DAC is able to connect with pin 6 of CTB port.

In this IC, CTB port is port 9 and pin 6 is not available.

so the other way to make output path of DAC is using buffer.

as you can see in following picture. When I set DAC output as buffered output, there is only one option that I could choose to use as DAC output path is v plus of opamp0.

but the indicator always shows me yellow light even I tried every other combination of connections.

of course I tried it after disabled all other peripherals even the debugging port. 

could you check this point?

Hi All,

In the case of the CYB06445LQI-S3D42 product, is there any data that shows how many ms it takes to 'Secure Boot'

from the device reset to the user application starts?

Even rough information is fine.

Best regards,

Alex Park.

Hi.

I'm trying to use the HAL System Power Management library to put the CM4 to sleep. So far, I've had no luck, and as I have found too many times, there is very little documentation available, and no examples. What documentation exists (e.g. Architecture TRM) is unclear, even suggesting that only masked interrupts can wake up a sleeping CPU.

Here's the environment:

• PSoC 63 with BLE in a custom board.
  • MTB 2.3.0 
  • BSP 2.3.0
  • PDL 2.3.0
  • HAL 2.1.0
• CM4 and CM0+ running FreeRTOS
• Several peripherals in use (BLE, I2C, UART, SPI, RTC, TWPCM, etc.)

1. I registered four callbacks using cyhal_syspm_register_callback(). 
2. I call cyhal_syspm_sleep().
3. The four callbacks are called with state set to CYHAL_SYSPM_CB_CPU_SLEEP and mode set to CYHAL_SYSPM_CHECK_READY. All callbacks return true.
4. The four callbacks are called again with state set to CYHAL_SYSPM_CB_CPU_SLEEP, but this time mode set to CYHAL_SYSPM_BEFORE_TRANSITION.
5. The four callbacks are immediately called a third time with state set to CYHAL_SYSPM_CB_CPU_SLEEP, but this time mode set to CYHAL_SYSPM_AFTER_TRANSITION.

The first problem is that the CPU either doesn't sleep, or wakes up immediately. I disable the RTOS SysTick interrupt in one of the callbacks. I also disable several other peripheral interrupts, and turn off the BLE stack, none of which has made a difference. It's likely that some interrupt is firing, but I can't think of a good way to determine which is the culprit.

The second problem is that the stated behavior, namely that the callbacks are called on wakeup (CYHAL_SYSPM_AFTER_TRANSITION) in the reverse of the order in which they are called on sleep (CYHAL_SYSPM_CB_CPU_SLEEP) does not match the observed behavior.
Callbacks are always called in the same order, even when one of the callbacks returns false in response to CYHAL_SYSPM_CHECK_READY.

Has anyone successfully used cyhal_syspm_sleep() to put one of the CPUs to sleep?

Thanks,

-Nick

Hello,

I have questions about Flash and Emulated EEPROM.

1. The flash endurance is described in the datasheet as 100k cycles.
Does each row of flash individually have 100k cycle endurance?

2. I'm using the Emulate_EEPROM example in modus toolbox. (CY8CKIT-062-WIFI-BT)
Please let me know how it works internally when using Em_EEPROM.

I want to know about the case of repeatedly writing a few bytes of data to the same address.
For example, when only a few bytes are to be written, will the entire line (512 bytes) including this address be erased and re-written?
Does the Em_EEPROM algorithm read the entire existing row of data into RAM before it is deleted, then modify only a few bytes and write it to flash?

Thanks and Regards,
YS

Dear Receiver, 

I practice "PSoC™ 6 MCU: MCUboot-based basic bootloader" by using the example code in the following GitHub link...

https://github.com/Infineon/mtb-example-psoc6-mcuboot-basic

I follow the steps and I can run boot, app (boot mode), and app (upgrade mode), separately.

But I feel confused about...

when I reset the board, there are no any response in the UART communication. Besides, LED blinking is also no response.

I think every time I reset MCU, it should enter boot mode. If no new image be found, it will enter app mode automatically.

in my test, it seems no any other response if I reset the board. I am sure boot code is in the CM0+ and app code is in the

CM4. Once I reset the board, boot code and app code seem disappear.

Could you please explain this phenomenon for me ?!

Thank you so much.

Dear Expert.

Hello. I have a question as below.

I'm trying to use the emwin Driver provided in PSOC6. (pre included Driver at MTB IDE)

1. Is there a extra cost to implement the graphic function using the driver? Or is it available for free?

Please help.

Hi,

We are trying to port the existing firmware in PSOC Creator to ModusToolbox to make it available for the new chips.

However, the biggest challenge we are facing right now is the Analog Multiplexer that's not available in ModusToolbox as it is in PSOC Creator.

I'm wondering if there is any example on how to use the AMUX in ModusToolbox?

Any help will be much appreciated.

Thanks in advance.

GP