Hi,
Now, I'm using CY8CPROTO-064B0S3 to emulate our product.
I want to add some features into the bootloader and build it for CY8CPROTO-064B0S3.
However, when I refer to "supported kits" section in "PSoC™ 6 MCU: MCUboot-based basic bootloader" page, CY8CPROTO-064B0S3 seems not to be supported.
Then, is it possible to build for CY8CPROTO-064B0S3 based on mcu-tools/mcuboot.git?
Thanks,
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Hello,
I'm testing UART(P5.0, P5.1) on CY8CKIT-062-WIFI-BT.
When I execute soft reset through NVIC_SystemReset(), UART Tx(P5.1) goes low for a while.
For this reason, the PC terminal utility receives 1 byte (0x00).
Is there any way to keep the UART Tx line high even after soft reset?
Thanks and Regards,
YS
Hello,
We have run into an issue in our project where a DMA channel stops before it has finished a transfer.
Here are the configs for the DMA:
In top design:
In user app:
Now, I have this chunk of code in the DMA interrupt handler
This if statement is meant to trigger when we finish the final X loop, and restart the DMA channel. So, this channel is basically supposed to keep going forever until an external condition stops it.
We are currently running into a case where the DMA channel stops transferring data, and the callback function stops getting called.
I tried logging the value of the following variable:
I see this value change when I call DMA Enable or DMA Disable, and it also changes when the DMA channel finishes the transfer (if I don't re-enable it in the interrupt handler). However, if the DMA stops by itself, the value stays constant before and after the DMA channel stops working.
Any insights into this issue will be much appreciated. Let me know if you need more information from me.
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I want to write a port in parallel as I can do.
I used the CY_GPIO_Port_Init function (gipoport, config); but how do I write the data ?.
with PSOC 5 use: void portxxx_Write (uint8 value);
Hello,
Is there an example of an application that allows TLS authentication (just authentication, without any further information exchange) via UART, USB CDC-ACM or USB CDC-NCM connection using Mbed-TLS with hardware acceleration?
Is there any set of examples from which I would be able to put together such an application?
Thanks in advance
Show LessIn my CY8CKIT-062S2-43012 board I looking for expanding RAM for operations of mallocs functions.
I have come across one example (QSPI_F-RAM_Access) where QSPI is used for reading and writing in F-RAM. I am not if this is the best example for expanding the RAM for the above purpose. Is that correct understanding?
I thought F-RAM has support for memory-mapped access of RAM but I can not find any example for that. Please share the link for such an example on any PSoC board.
Show LessHi Sir,
We use MTB IDE, is there any code example about CY8C6245 Softreset ? thanks.
Regards
Paddy
Hello everyone,
I made a testing firmware that blinks an LED, which runs fine on my development board CY8CKIT-062S2-43012 but not on my custom board, which seems not to run the firmware at all. The MCU revision is slightly different (read by the programmer).
Development board:
Detected device PN: CY8C624ABZI-S2D44 SiliconID: E453 Revision: 12 FamilyID: 102 DIE: PSoC6A2M (read by the programmer)
CY8C624ABZI-S2D44ES2 (written on chip)
Custom board:
Detected device PN: CY8C624ABZI-D44 SiliconID: E402 Revision: 11 FamilyID: 102 DIE: PSoC6A2M (read by the programmer)
CY8C624ABZI-S2D44A0 (written on chip)
I see that the chip revision is different (Rev 12 on dev board and rev 11 on my board). Are there any firmware considerations I need to take into account between these 2 revisions or should the same firmware just work on both of them?
Are there any hardware considerations I need to take into account between these 2 revisions?
UPDATE: dev board has WCO but our board doesn't. What changes do I need to make to disable the WCO? I found #define CY_CFG_SYSCLK_WCO_ENABLED 1 in cycfg_system.c but commenting it out breaks the firmware on the dev kit as well.
Many thanks,
Remus.
Hello,
when I add svd file to see the peripheral register,every port (port0 to port14) has the same address.
※modus version is 2.2
But in another version(2.3),GPIO shows a correct address .
Was it a bug in version 2.2 Or I did a wrong config?.
Show LessHi,
When I was looking at the CSD (Self-Capacitance) Proximity, I noticed a common shift in baseline despite no change in environment. The shift is much larger than the signal and the noise. I am wondering if there is any way to prevent this from occurring.
Thank you!
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