PSoC™ 6 Forum Discussions
Hello community member,
I have been working with PSoC 6 MCU EVK kit, which is a 062S4 pioneer kit. I am working to get this kit running as the SPI master to send data out to the SPI slave. But things are not quite with the firmware. Here are my details related to the firmware.
SPI master for PSoC 6 -
1. PSoC 6 is set as SPI master (using Modustoolbox to create the project) and using the PDL library to set everything.
2. SPI master settings: Data rate: 100kbps, 16-bit data width, MSB first, Mode-Motorola (MODE-0), Oversample-16.
3. Data to be sent to SPI slave: 0xF0F0
4. Used PDL library to send the data: Cy_SCB_SPI_Transfer()
The problem is here that, the data is coming early from MOSI as SCLK is coming late when SS is low. Why is it so? The SPI slave expects the data below format:
vs what I am getting.
Yellow-SS, Pink-SCLK, Blue-MOSI
As it can be seen that MOSI is coming before SCLK is driven high, so what is this issue?
Please help me with this.
I have a program which is continuously sampling data until 240 bytes of data and then print the data and then the cycle continues. The board needs to be powered up at 3.3 V supply only.
The current I am measuring with this setup is around 4mA. I have several other methods from the cy_syspm.c to lower down the power but none of them seems to work. The project of mine is attached herewith.
Could anyone tell me some method to lower down the current?
Looking forward to hear from you.
Anik SenguptaShow Less
How do I use a Pemicro Multilink Universal debug module in ModusToolbox3? I have the GDB Pemicro server installed on my computer because I use it with NXP Kinetis Design Studio. When I try to create a debug configuration in ModusToolbox 3 that selection is not in the list.Show Less
I am trying to use MTB wifi example projects on my hardware that uses an MCU that does not have crypto hardware like the devkit MCU has (devkit is CY8CKIT-062-WiFi-BT) but I immediately run into an issue with mbedtls and secure-sockets with undefined references to functions that use the trng hardware during linking phase:
/Applications/ModusToolbox/tools_3.0/gcc/bin/../lib/gcc/arm-none-eabi/10.3.1/../../../../arm-none-eabi/bin/ld: /Users/mark.ennamorato/xxxxxxx/Wi-Fi_Scan//../mtb_shared/secure-sockets/release-v3.1.0/source/COMPONENT_MBEDTLS/cy_tls.c:404: undefined reference to `cyhal_trng_generate'
How do I solve this? Is there a way to use software library instead of hardware engine? Also.. I need to use SDIO interface to 4343W WiFi/BT sip
i'm in trouble with a device that does not load the new application because it fails this function (Cy_DFU_ValidateMetadata(..)).
Trying with another device all work perfectly.
I compared the entire flash of the two devices and it's the same.
Why it fails? it returns CY_DFU_ERROR_VERIFY
Help pleaseShow Less
I have been working on a project using a PSOC CY8C6247 with 2 ADC traced to Port7 pin6 and 7. We have used all the dedicated ADCs on port10 for other analogue conversions.
I have been trying to configure the micro to switch port7 pin6&7 to AMUXBUSA and AMUXBUSB. Then mapping AMUXBUSA & B to the SAR MUX.
Unfortunately, I haven’t had any success in doing so. I have tried modifying our existing codebase. I have tried using PSOC creator to generate the register configuration, but this looked to be incomplete.
Looking at the Analog System diagram from the datasheet I think we might have made a mistake with port 7 pin 7 but pin 6 should be configurable to AMUXBUSA and subsequential to the SAR AMUX.
Essentially, I am trying to find out if there are any examples implementing addition ADC’s from GPIO’s not on port10? Perhaps there is an example for this in PSOC creator? I have been able to find one.
Any help with this would be greatly appreciated as this has become a bit of a blocker for us.
I have been unable to determine how to blow the efuses on a CY8C6144LQI-S4F92. I have tried Psoc Programmer, Cypress Programmer, and JFlash.
The CY8C6144LQI-S4F92 does not appear in the list of mcus that are supported by Psoc Programmer.
With Cypress Programmer, every time I try to program the efuses I get an error and have been unable to find what the error means or how to solve.
I have 2.56 V on the VDD lines. I am able to program the main firmware without issues.Show Less
I'm trying to develop OTA DFU for PSoC 6 MCU (CYBLE-416045-02).
I thought DFU_BLE_Upgradable_Stack (app0, app1, app2) example (PSoC Creator 4.4) and CySmart Mobile app would be a good place to start. But I run into multiple problems.
1. It happens a lot that when trying to connect I get "Services unavailable" message. After multiple retries and toggling Bluetooth on/off it starts working again.
2. When there is only Launcher (app0) and BLE stack (app1) flashed the app (app2) gets flashed (updated) and run successfully. If app is already flashed, I am always stuck at entering bootloader command (0%).
3. Every second time the CySmart Mobile app gets stuck at reading the file, it completely freezes.
I also tired PSoC6DfuBle example (the one with separate stack - app0, app1) and run into exactly same problems. This can be reproduces with multiple cell phones and android versions.
What could be causing this? Is there some common issue that I am overseeing?
Thanks in advance.
I have two PSoC 6 BLE devices: a PSoC 6 BLE Pioneer board which acts as the peripheral, and a PSoC 6 BLE Prototyping board which acts as the central. I am trying to reduce power consumption between these two devices by extending the connection parameters Max Interval, Min Interval, Slave Latency and Connection Timeout. There is an example here: https://community.infineon.com/t5/Resource-Library/PSoC-6-BLE-Peripheral-Updating-Connection-Parameters/ta-p/288533 but this does not appear to work.
After the two devices are connected, I call Cy_BLE_L2CAP_LeConnectionParamUpdateRequest from the peripheral device to change the central device's settings set in the BLE component. This function returns a CY_BLE_SUCCESS when I call it. In the example, after doing this the code expects a CY_BLE_EVT_L2CAP_CONN_PARAM_UPDATE_RSP event to be generated at the peripheral, but this does not happen, and the parameters on the link are not changed (shown by inspecting the power consumption of the peripheral via a current amplifier on my scope).
Please note I am not running the actual example itself. In the process of finding the example I had already checked out the API and had tried using the above L2CAP function and found it generates a CY_BLE_EVT_GAP_ENHANCE_CONN_COMPLETE event which contains a structure cy_stc_ble_gap_enhance_conn_complete_param_t at the central end and at the peripheral; the parameters of this struct show that the parameters have not changed but indicate an okay status for the event.
I had also seen that depending on whether link privacy is set up, different events related to the connection parameters get fired CY_BLE_EVT_GAP_DEVICE_CONNECTED if it is not and CY_BLE_EVT_GAP_ENHANCE_CONN_COMPLETE if it is: these events have different structs associated with them.
So my questions are: how do I get this functionality to work? and does it work with link privacy set?Show Less
i dont have proper pin discreption , i want to mapp psoc5 to psoc6 pins so pls guide me or tell me any discreption about psoc6 pins,
i want to know about what are the pins are going to mapp the psoc5 to psoc6Show Less