PSoC™ 6 Forum Discussions
Hi everyone,
I'm working on an application with PWM signals, but I'm encountering issues with PSoC 6, in modus(the application must change the frequency between 1MHZ to 30Khz) .
When I want to change the period to get another frequency in the output, this signal changes but after some times this signal just turn high and then the pwm signal disappear. After 1 minute with 25 seconds aprox. the pwm functions again, and repeats the cycle.
I change the board but is the same, this is an example of the code, with this code occurs exactly the same.
I try to do it with PDL library and also with hal(that are the lines inside the for loop)
I leave some images of the device configurator to use the hal library and the configuration of the pdl.
I would greatly appreciate your help.
Kind regards
cy_stc_tcpwm_pwm_config_t pwm_config_sic =
{
/* .pwmMode = */ CY_TCPWM_PWM_MODE_PWM, /* PWM with Dead Time */
/* .clockPrescaler = */ CY_TCPWM_PWM_PRESCALER_DIVBY_1, /* Clk_counter = Clk_input / 1*/
/* .pwmAlignment = */ CY_TCPWM_PWM_LEFT_ALIGN, /* PWM signal is left aligned, meaning it starts high */
/* .deadTimeClocks = */ 0UL, /* time-clocks of death time*/
/* .runMode = */ CY_TCPWM_PWM_CONTINUOUS, /* Wrap around at terminal count. */
/* .period0 = */ 50, /* Period of 100 (0-99). Terminal count event when rolls over back to 0. */
/* .period1 = */ 50, /* Period of 200 (0-199). Terminal count event when rolls over back to 0. */
/* .enablePeriodSwap = */ false, /* period swapping feature is enabled */
/* .compare0 = */ 25, /* duty cycle 33% (with period 100) */
/* .compare1 = */ 25, /* duty cycle 33% (with period 200) */
/* .enableCompareSwap = */ false, /* compare swapping feature is enabled */
/* .interruptSources = */ CY_TCPWM_INT_NONE, /* interrupt will rise on terminal count */
/* .invertPWMOut = */ CY_TCPWM_PWM_INVERT_DISABLE, /* Not invert */
/* .invertPWMOutN = */ CY_TCPWM_PWM_INVERT_DISABLE, /* Not invert */
/* .killMode = */ CY_TCPWM_PWM_STOP_ON_KILL, /* PWM stops counting on kill */
/* .swapInputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
/* .swapInput = */ CY_TCPWM_INPUT_0,
/* .reloadInputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
/* .reloadInput = */ CY_TCPWM_INPUT_0,
/* .startInputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
/* .startInput = */ CY_TCPWM_INPUT_0,
/* .killInputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default state (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
/* .killInput = */ CY_TCPWM_INPUT_0,
/* .countInputMode = */ CY_TCPWM_INPUT_LEVEL, /* Set this input to LEVEL and 1 (high logic level) */
/* .countInput = */ CY_TCPWM_INPUT_1, /* So the PWM will be enabled forever */
/* .swapOverflowUnderflow = */ false, /* Use default overflow/underflow behavior */
/* .immediateKill = */ false, /* Specifies whether the kill event immediately deactivates the dt_line_out and dt_line_compl_out or with the next module clock */
/* .tapsEnabled = */ 0x00UL, /* In pseudo random mode this sets the enabled taps.*/
/* .compare2 = */ 50UL, /* duty cycle 33% (with period 100) */
/* .compare3 = */ 100UL, /* duty cycle 33% (with period 200) */
/* .enableCompare1Swap = */ true, /* Not implemented yet*/
/* .compare0MatchUp = */ true, /* Not implemented yet*/
/* .compare0MatchDown = */ true, /* Not implemented yet*/
/* .compare1MatchUp = */ true, /* Not implemented yet*/
/* .compare1MatchDown = */ true, /* Not implemented yet*/
/* .kill1InputMode = */ CY_TCPWM_INPUT_RISINGEDGE, /* This input is NOT used, leave it in default s tate (CY_TCPWM_INPUT_RISINGEDGE = 0UL) */
/* .kill1Input = */ CY_TCPWM_INPUT_0,
/* .pwmOnDisable = */ CY_TCPWM_PWM_OUTPUT_HIGHZ, /* Default High impedance mode*/
/* .trigger0Event = */ CY_TCPWM_CNT_TRIGGER_ON_DISABLED, /* Disable output trigger0 event generation*/
/* .trigger1Event = */ CY_TCPWM_CNT_TRIGGER_ON_DISABLED,
};
// PWM signals
//Enable MCU's Pin P0_2 to PWM management TCPWM 0 32 bits
Cy_GPIO_Pin_FastInit(P0_2_PORT, P0_2_NUM, CY_GPIO_DM_STRONG, OFF, P0_2_TCPWM0_LINE1);
//Enable MCU's Pin P0_3 to PWM_n management TCPWM 0 32 bits
Cy_GPIO_Pin_FastInit(P0_3_PORT, P0_3_NUM, CY_GPIO_DM_STRONG, OFF, P0_3_TCPWM0_LINE_COMPL1);
// Assign the clock to the TCPWM peripheral. The last parameter is the number of div clock
Cy_SysClk_PeriphAssignDivider(PCLK_TCPWM0_CLOCKS1, CY_SYSCLK_DIV_16_BIT, 1UL);
// Divider the clock by 1 to get 100MHz as an input clock
Cy_SysClk_PeriphSetDivider(CY_SYSCLK_DIV_16_BIT, 1UL, 1UL);
// Enable the divider clock
Cy_SysClk_PeriphEnableDivider(CY_SYSCLK_DIV_16_BIT, 1UL);
// Initialize TCPWM block
Cy_TCPWM_PWM_Init(TCPWM0, TCPWM_NUM_PWM, &pwm_config_sic);
// Enable the TCPWM block
Cy_TCPWM_PWM_Enable(TCPWM0, TCPWM_NUM_PWM);
// Start the PWM
Cy_TCPWM_TriggerReloadOrIndex(TCPWM0, TCPWM_PWM_MASK);
// Initialize the TCPWM block
Cy_TCPWM_PWM_Init(PWM_HW, PWM_NUM, &PWM_config);
// Enable the TCPWM block
Cy_TCPWM_PWM_Enable(PWM_HW, PWM_NUM);
// Start the PWM
Cy_TCPWM_TriggerReloadOrIndex_Single(PWM_HW, PWM_NUM);
/* Enable global interrupts */
__enable_irq();
for (;;)
{
Cy_TCPWM_TriggerStopOrKill_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
Cy_TCPWM_PWM_SetPeriod0(PWM_HW, PWM_NUM, 100);
Cy_TCPWM_PWM_SetCompare0(PWM_HW, PWM_NUM, 50);
Cy_TCPWM_TriggerStart_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
Cy_TCPWM_TriggerStopOrKill_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
Cy_TCPWM_PWM_SetPeriod0(PWM_HW, PWM_NUM, 200);
Cy_TCPWM_PWM_SetCompare0(PWM_HW, PWM_NUM, 100);
Cy_TCPWM_TriggerStart_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
Cy_TCPWM_TriggerStopOrKill_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
Cy_TCPWM_PWM_SetPeriod0(PWM_HW, PWM_NUM, 400);
Cy_TCPWM_PWM_SetCompare0(PWM_HW, PWM_NUM, 200);
Cy_TCPWM_TriggerStart_Single(PWM_HW, PWM_NUM);
CyDelay(1000);
}
}
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We have connect the device with the SWD interface and when we try to connect with the programmer we are facing below error:
Info : [CyBridge] Connected - MiniProg4 CMSIS-DAP BULK-1623198900212400
Info : Selected Device: MP4 BULK-1623198900212400
Info : Open On-Chip Debugger 0.10.0+dev-1.0.0.226 (2018-11-09-17:51)
Info : Licensed under GNU GPL v2
Info : For bug reports, read
Info : http://openocd.org/doc/doxygen/bugs.html
Info : /home/vvdn/Downloads/Cypress_programmer/CyProgrammer_2.0.0.355
Info : ./openocd
Info : /home/vvdn/Downloads/Cypress_programmer/CyProgrammer_2.0.0.355/BT
Info : 1623198900212400
Info : 3:7
Info : swd
Info : adapter speed: 1500 kHz
Info : cyp_detect_target.cfg
Warn : Transport "swd" was already selected
Info : cyp_get_mpn
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: JTAG Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : VTarget = 3.294 V
Info : clock speed 1500 kHz
Error: DAP 'test.cpu' initialization failed (check connection, power, etc.)
Please check and help to resolve this as we are not able to connect with the programmer.
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