PSoC™ 6 Forum Discussions
Could you let me know please what is the current peak in mA of the BLE peripheral in PSoC6?
When I can have the PSoC6 dev board and according PSoC Creator software to start my experiments?
Does the BLE Stack run on M0+ or M4?
I have a few questions about two-processor PSoCs.
If I declare a global variable in a header file inside shared-code folder, how will this be compiled?
Will this get compiled as two variables, one for each core? Or will this be compiled as a shared memory location?
If the first, how should I declare shared memory?
And the last question, how will volatile keyword behave in two-processor environment? I used to declare variable as volatile, when it may be accessed from multiple ISRs and/or non-interrupt code. Does this mean that all shared memory should be volatile?
What is Smart IO and GPIO_OVT?
Can I connect internal periphery to any pins like at PSoC 5 or some pin are fixed like at PSoC 4?
as long as there is no Silicon available, i would like to start some ideas in the PSoC-Creator. I want to be ready at the time, the first samples are available for me.
I use the actual "PSoC Creator 4.0 Update 1 (18.104.22.1682)". Is there an addon to implement the features of the PSoC6? Or, ist there anything I'm overlooking?
...hoping to start my first PSoC6 Project.....
Martin KrausShow Less
I would like to ask if PSoC6 supports the following.
1. Can we use the PLDs in the Universal Digital Blocks in order to fit a hardware multiplier?
For example, in PSoC4, I could fit a 3x3 bit hardware multiplier using the PLDs. Could we support a 16x16=32bit hardware multiplier in PSoC6's PLDs?
2. Can we access chip's RAM from verilog when we design a custom PSoC6 component?
3. The PSoC4 has the CyBle_SetTxPowerLevel() function to change the transmission power level. The input parameter configures power from -18db to +3db. What are the options in PSoC6? Can we configure the transmission power at -80db for example?
I was waiting for information about PSoC6 some time ago, it looks impressive. I noticed on the presentation video that PSoC6 will have less UDBs than the 5LP family, i think the programmable logic inside PSoC make it unique (on the microcontroller sector), so personally i was expecting PSoC6 with more UDBs.
I got some questions regarding that:
* The UDBs inside PSoC6 have the same architecture as the UDBs on the 5LP family?
* Can we expect PSoC6 sub-families with more programmable logic?
* Is clear PSoC6 is focused on IoT and security, maybe can we expect a 5LP device with more UDBs?
Thanks in advanceShow Less
Couple questions about the upcoming psoc 6.
Are there plans for an inexpensive usb board like the $10 psoc 5 059 kit in addition to the more expensive pioneer kit?
Just curious how many UDB's will be available on the psoc 6 chips, range or ballpark is fine(really hoping for an increase over the psoc 5)?