What is Smart IO and GPIO_OVT?
Can I connect internal periphery to any pins like at PSoC 5 or some pin are fixed like at PSoC 4?
Are there any plans to support an Ethercat slave peripheral (possibly as an extension of an Ethernet port)? Adding this would be a huge thing, and something no one else is doing in low power configurable micros yet.
Also, STRONGLY suggest that you look at how Renesas are doing their Synergy stuff. That model (free bundle of commercial IAR EW, and ThreadX, with full HAL, framework and BSP) REALLY works for us embedded engineers. Do something similar here and no other manuf will be able to compete. BTW.. FreeRTOS is OK, but not in same class as ThreadX.
I was waiting for information about PSoC6 some time ago, it looks impressive. I noticed on the presentation video that PSoC6 will have less UDBs than the 5LP family, i think the programmable logic inside PSoC make it unique (on the microcontroller sector), so personally i was expecting PSoC6 with more UDBs.
I got some questions regarding that:
* The UDBs inside PSoC6 have the same architecture as the UDBs on the 5LP family?
* Can we expect PSoC6 sub-families with more programmable logic?
* Is clear PSoC6 is focused on IoT and security, maybe can we expect a 5LP device with more UDBs?
Thanks in advanceShow Less
Couple questions about the upcoming psoc 6.
Are there plans for an inexpensive usb board like the $10 psoc 5 059 kit in addition to the more expensive pioneer kit?
Just curious how many UDB's will be available on the psoc 6 chips, range or ballpark is fine(really hoping for an increase over the psoc 5)?