PSoC™ 6 Forum Discussions
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On a PSoC6 CY8C6247BZI-D34 we're having some trouble getting the M0+ to access the USB as a slave device. The available USB examples only use the M4 core, when we try to move that code over to the M0+ it compiles fine but doesn't seem to run. Debugging it lands us in some odd disassembly location with a corrupt (or otherwise unreadable) call stack. Any ideas?
Show LessHello good people from the community,
I have CY8CPROTO-062-4343W board with me and some screen that has ILI9341 driver that is pre-configured on 16 bit i8080 interface.
I have no problems using this screen with FreeSoC2 board, that has PSoC5 CY8C5888AXI-LP096, and with CY8CPROTO-063-BLE board since I use PsoC Creator where I can find and use GraphicsLCDIntf component which has all the necessary API to send data and commands to the screen.
Since CY8CPROTO-062-4343W is programmed only via ModusToolbox because it has the PSoC62 MCU (CY8C624ABZI-D44) that isn't supported in PSoC Creator and, if I'm correct, it doesn't have UDB's that are used in GraphicsLCDIntf component on boards that I mentioned before, how can I send data or commands to the screen now since I can't find something similar to the GraphicsLCDIntf in Configure Device or Select Middleware dialog?
Thanks,
Sava
Show LessHi,
I don't find any spec about the SIMO Buck in datasheet Electrical Specifications, TRM or AN218241.
Only thing I can get is the MPN of the Inductor in EVK.
I think I must miss some portion about this component inside PSoC6. It does not make any sense to unknow the SIMO buck spec about the Power system of PSoC6, it impacts engineer to select inductor or capacitor for the PSoC6 SIMO Buck external. There is no idea about the efficiency,buck drive frequency to valuate the performance.
Please tell me where I can find this spec?
Regards,
Ray
Show LessIs there a direct way of measuring the voltage input to the CYBLE-416045 on pin VDD without also routing to an I/O with a voltage divider and measuring with an ADC?
Let the community know...
Show LessI am trying to write data to the EEPROM flash rows using the PSOC6 BLE PIONEER KIT.
Here is my code running on CM0+. It completes with Success. However, the flash row is not updated when viewing memory with the debugger.
uint32_t board_flash_rows[8][128] __attribute__((section(".cy_em_eeprom"),aligned(512)));
int main(int argc, char** argv) {
Cy_SysDisableCM4();
__enable_irq();
{
static uint32_t data[128] = {0};
std::fill_n(data,128,0xDEADBEEF);
int rc = Cy_Flash_WriteRow(reinterpret_cast<uint32_t>(board_flash_rows),data);
while(rc != 0) {}
}
for(;;) {__WFI();}
return 0;
}
Thoughts?
Thanks.
Show LessHi,
I'm trying to load a .cyacd2 file into my code by using cybtldr_parse.c.
Everything works fine until I reach the end of the file. At that point, CyBtldr_ReadLine() returns CYRET_ERR_EOF.
By looking at the condition for failing, I find it a bit hard to follow the logic.
if (NULL != dataFile && !feof(dataFile))
{
if (NULL != fgets(buffer, CY_MAX_BUFFER_SIZE * 2, dataFile))
{
len = strlen(buffer);
while (len > 0 && ('\n' == buffer[len - 1] || '\r' == buffer[len - 1]))
--len;
}
else
err = CYRET_ERR_EOF;
}
else
err = CYRET_ERR_FILE;
It looks like the first if() is there because the code expects the last line to be incomplete. However, if the last line was complete, followed immediately by the EOF, then the first if() fails and returns CYRET_ERR_FILE.
Wouldn't the following be better?
if (NULL != dataFile)
{
if (!feof(dataFile) && (NULL != fgets(buffer, CY_MAX_BUFFER_SIZE * 2, dataFile)))
{
len = strlen(buffer);
while (len > 0 && ('\n' == buffer[len - 1] || '\r' == buffer[len - 1]))
--len;
}
else
err = CYRET_ERR_EOF;
}
else
err = CYRET_ERR_FILE;
Thank you,
Fred
Show LessGood day,
I'm currently having some issues with sending data from the SAR-Result-Register to the SRAM. I want to sample 5.100 values and send them to the SRAM. For debugging reasons the UART component sends the array afterwards to my computer.
The problem is that the array doesn't get filled properly. I took the DMA source code from an example project but I'm not sure if I use the proper register as source for the DMA. The register part in the SAR datasheet is outdated unfortunately.
Please help me to find out what I've done wrong.
Show LessI am using J-Link to program the secure bootloader but the chip cannot reset and run the bootloader after programming is finished. I have to cut the supply power and power on again for the bootloader to run. If I connect a Miniprog 3 after programming, I can reset and run using PSoC Programmer by pressing the Load from Device button. What is Miniprog 3 doing to reset and run that J-Link can't? The device is powered by external voltage and not by the debugger. This is the J-Link log when it is stuck:
Found SW-DP with ID 0x6BA02477
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[1]: AHB-AP (IDR: Not set)
AP[2]: AHB-AP (IDR: Not set)
AP[1]: Core found
AP[1]: AHB-AP ROM base: 0xF0000000
CPUID register: 0x410CC601. Implementer code: 0x41 (ARM)
Found Cortex-M0 r0p1, Little endian.
FPUnit: 4 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ F0000000
ROMTbl[0][0]: E00FF000, CID: B105100D, PID: 000BB4C0 ROM Table
ROMTbl[1] @ E00FF000
ROMTbl[1][0]: E000E000, CID: B105E00D, PID: 000BB008 SCS
ROMTbl[1][1]: E0001000, CID: B105E00D, PID: 000BB00A DWT
ROMTbl[1][2]: E0002000, CID: B105E00D, PID: 000BB00B FPB
ROMTbl[0][1]: F0002000, CID: B105900D, PID: 000BB9A6 ???
ROMTbl[0][2]: F0003000, CID: B105900D, PID: 001BB932 MTB-M0+
Cortex-M0 identified.
J-Link>h
PC = FFFFFFFE, CycleCnt = 00000000
R0 = 08000830, R1 = 72707943, R2 = 00000000, R3 = 10000400
R4 = 000001A3, R5 = 00000D04, R6 = 16000200, R7 = 16000203
R8 = 7C230F57, R9 = 94A92521, R10= 49000A30, R11= 30E871C4
R12= 000000CA
SP(R13)= 080007F0, MSP= 080007F0, PSP= D00D2404, R14(LR) = FFFFFFF9
XPSR = 21000003: APSR = nzCvq, EPSR = 01000000, IPSR = 003 (HardFaultMemManage)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
FPU regs: FPU not enabled / not implemented on connected CPU.
J-Link>r
Reset delay: 0 ms
Reset type NORMAL: Resets core & peripherals via SYSRESETREQ & VECTRESET bit.
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
J-Link>h
PC = 00000F00, CycleCnt = 00000000
R0 = 00000000, R1 = 00000300, R2 = 05FA0000, R3 = 40210000
R4 = 16007C00, R5 = 00000D04, R6 = 16000200, R7 = 16000203
R8 = 7C230F57, R9 = 94A92521, R10= 49000A30, R11= 30E871C4
R12= 000000CA
SP(R13)= 08047800, MSP= 08047800, PSP= D00D2404, R14(LR) = 16002BAF
XPSR = 61000000: APSR = nZCvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
FPU regs: FPU not enabled / not implemented on connected CPU.
J-Link>go
J-Link>h
PC = 1000288E, CycleCnt = 00000000
R0 = 08000830, R1 = 72707943, R2 = 00000000, R3 = 10000400
R4 = 000001A3, R5 = 00000D04, R6 = 16000200, R7 = 16000203
R8 = 7C230F57, R9 = 94A92521, R10= 49000A30, R11= 30E871C4
R12= 000000CA
SP(R13)= 08000810, MSP= 08000810, PSP= D00D2404, R14(LR) = 10002889
XPSR = 21000000: APSR = nzCvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000000, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 00
FPU regs: FPU not enabled / not implemented on connected CPU.
CM4:
PC = 1600400C, CycleCnt = 87ED1EC5
R0 = 40210400, R1 = 0000000E, R2 = 402102C0, R3 = 16004000
R4 = 16004009, R5 = B5E02A00, R6 = 204C292E, R7 = 01B4BE8B
R8 = 39879D2D, R9 = 08026DFC, R10= 30ABB4F6, R11= AA668C14
R12= C1580459
SP(R13)= 00000000, MSP= 00000000, PSP= 8F3E240C, R14(LR) = FFFFFFFF
XPSR = 61000000: APSR = nZCvq, EPSR = 01000000, IPSR = 000 (NoException)
CFBP = 00000001, CONTROL = 00, FAULTMASK = 00, BASEPRI = 00, PRIMASK = 01
FPS0 = 8AC147BE, FPS1 = 31949889, FPS2 = 4617EC03, FPS3 = 8C422320
FPS4 = 940932AB, FPS5 = 704F86A2, FPS6 = DE7A2D60, FPS7 = A8E98CCB
FPS8 = 2C41A285, FPS9 = 0206A17A, FPS10= 2666A854, FPS11= 50D686C2
FPS12= A4B553C6, FPS13= ED1BD089, FPS14= 24B5E15A, FPS15= 0258DACC
FPS16= 0642280C, FPS17= CD070262, FPS18= 84AF188E, FPS19= 81152560
FPS20= 60B383C8, FPS21= CB69B1B0, FPS22= E381F182, FPS23= C7858285
FPS24= 8C8DC7F4, FPS25= 4AE2A08F, FPS26= 68A071EC, FPS27= 5C209461
FPS28= 6D42298A, FPS29= A3E07974, FPS30= 2A0050B1, FPS31= 04D18981
FPSCR= 00000000
Show Less