PSoC™ 6 Forum Discussions

I've trained a C code LeNet model (float) on the MNIST dataset. Then used the same code's test and evaluation function on test data taken from the test dataset.

I've not changed the original C code besides removing the training code, and adding arrays for weights and test images.

The code runs correctly on the PSoC 6 (CY8C624ABZI-S2D44 part) and ARM M4 processor at 100MHz and classifies the MNIST test images correctly.

However, when I time the cycles taken for the core evaluation function it is seemingly horrendous (~0.21 secs). I've experimented with the various compiler optimizations and chip settings possible. It is still dire for a CPU with a FPU and DSP extensions - its not a low-end M0 core, for instance.

I've also checked the assembly: it is using the FPU and DSP instructions. I also tried implementing key parts of the C code using the ARM CMSIS DSP libraries, which results in slightly  worse performance (the compiler seems better at optimizing ironically). I found similar threads online about CMSIS.

And, further to compare I used some existing ML CIFAR code written to use the CMSIS NN library. While the model is more complex than LeNet the numbers for one evaluation of test data are of the same unexpected order (~0.29 secs (3 samples per sec)).

Given I was surprised by the numbers. I took the same LeNet code and compiled it with all optimisations on as before, to a MicroBlaze running at 100MHz with a FPU enabled (8Kb caches to match the PSoC-6 datasheet); and put it on a Spartan 6 FPGA. This CPU doesn't have the fancy DSP instructions or optimizations the M4 is supposed to have. It is a vanilla general purpose processor, indeed, supposedly quite average.

The result: the time to run the code to evaluate one MNIST sample was: ~0.055 sec - which is a 3-4x difference. 3-4 more samples can be processed per second. This is the sort of number I expected originally in my head from the PSoC-6.

So what exactly is the issue with the M4, it has a better instructions and so on. Any explanations for a 3-4x difference.. ARM selling us a pipe dream.. PSoC-6 design issues..

Hi

I am trying to create a simple program to read 10 bytes on UART through DMA and then write it again to the UART using DMA.

I added blinking LEDs in the DMATxISR and DMARxISR as visual indication that the ISR is being called.

It works for DMA Rx, but fails in DMA Tx.

I  tried to use memcpy() to copy the Rx buffer into the Tx buffer to engage DMATx, but it doesn't work. I can only send using PutArray().

I attached my project,

I wonder if you can help me out find the mistake.

thanks

Dear Forum:

I know that
The Hex file generated by the Modus Tool box IDE  follows the Intel Hex File format  which is supported by the Cypress Programmer.

from the following title.

https://community.infineon.com/t5/PSoC-6/PSoC-programmer-parsing-failure/td-p/716946

I want to confirm that

Which IDE can generate hex file used by PSoC programmer?

Thank you.

Dear supporter,

I would like to translate the following KBA. Could you confirm?

PSoC™ 6 MCU with Bluetooth® LE: Reading sleep clock accuracy – KBA238648
https://community.infineon.com/t5/Knowledge-Base-Articles/PSoC-6-MCU-with-Bluetooth-LE-Reading-sleep-clock-accuracy-KBA238648/ta-p/690974

Bestregars,
JUTA_2823561

I am trying to debug the program by adding the breakpoints and  ran into this error. What does this error means and how can we resolve it?

Info : Voltage is stable for more than 5 sec, assuming power is good
Sensed power restore, running reset init and halting GDB.
Info : SWD DPIDR 0x0bb11477
Info : kitprog3: acquiring the device (mode: reset)...
** Device acquired successfully
Info : SWD DPIDR 0x0bb11477
Error: Failed to read memory at 0x1000003e
Info : SWD DPIDR 0x0bb11477
Error: Failed to read memory at 0x1000003e
Info : SWD DPIDR 0x0bb11477
Error: Failed to read memory at 0x1000003e
Info : SWD DPIDR 0x0bb11477
Error: Failed to read memory at 0x10000102
Info : SWD DPIDR 0x0bb11477
Error: Failed to read memory at 0x10000102

CYPM1116-48LQXI #EZ-PD PMG1-B1

Hi,

Using mtb-programmer, the KitProg from CY8CKIT-145-40xx does not support option to program PSoC6.

However, the same KitProg can program PSoC6 within ModusToolbox.

Started by GNU MCU Eclipse
Open On-Chip Debugger 0.12.0+dev-5.0.1.2520 (2023-07-25-04:37)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
cortex_m reset_config sysresetreq
Info : Using CMSIS-flash algorithms 'CY8C6xxA_SMIF' for bank 'psoc6_smif0_cm0' (footprint 17632 bytes)
Info : CMSIS-flash: ELF path: ../flm/cypress/cat1a/CY8C6xxA_SMIF.FLM
Info : CMSIS-flash: Address range: 0x18000000-0x1FFFFFFF
Info : CMSIS-flash: Program page size: 0x00001000 bytes
Info : CMSIS-flash: Erase sector size: 0x00040000 bytes, unified
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : Using CMSIS-DAPv2 interface with VID:PID=0x04b4:0xf155, serial=0611146703097400
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.50.1401
Info : KitProg3: Pipelined transfers enabled
Info : KitProg3: Asynchronous USB transfers enabled
Info : VTarget = 4.940 V
Info : kitprog3: acquiring the device (mode: reset)...
Info : clock speed 2000 kHz
Info : SWD DPIDR 0x6ba02477
Info : [psoc6.cpu.cm0] Cortex-M0+ r0p1 processor detected
Info : [psoc6.cpu.cm0] target has 4 breakpoints, 2 watchpoints
***************************************
** Silicon: 0xE402, Family: 0x102, Rev.: 0x11 (A0)
** Detected Device: CY8C624ABZI-D44
** Detected Main Flash size, kb: 2048
** Flash Boot version: 3.1.0.45
** Chip Protection: VIRGIN
***************************************
Info : [psoc6.cpu.cm4] Cortex-M4 r0p1 processor detected
Info : [psoc6.cpu.cm4] target has 6 breakpoints, 4 watchpoints
Info : starting gdb server for psoc6.cpu.cm0 on 3333
Info : Listening on port 3333 for gdb connections
Info : starting gdb server for psoc6.cpu.cm4 on 3334
Info : Listening on port 3334 for gdb connections
Info : SWD DPIDR 0x6ba02477
Info : kitprog3: acquiring the device (mode: reset)...
[psoc6.cpu.cm0] halted due to debug-request, current mode: Thread
xPSR: 0x41000000 pc: 0x00000190 msp: 0x080ff800
** Device acquired successfully
** psoc6.cpu.cm4: Ran after reset and before halt...
[psoc6.cpu.cm4] halted due to debug-request, current mode: Thread
xPSR: 0x01000000 pc: 0x0000012a msp: 0x080ff800
Started by GNU MCU Eclipse
Info : Listening on port 6666 for tcl connections
Info : Listening on port 4444 for telnet connections
Info : accepting 'gdb' connection on tcp/3333
Info : New GDB Connection: 1, Target psoc6.cpu.cm0, state: halted
Warn : Prefer GDB command "target extended-remote :3333" instead of "target remote :3333"
Verifying region (0x10000000, 6352)... Match
Verifying region (0x10002000, 905480)... Match
Info : All data matches, Flash programming skipped
Info : SWD DPIDR 0x6ba02477
[psoc6.cpu.cm0] halted due to debug-request, current mode: Thread
xPSR: 0x81000000 pc: 0x10000fc0 msp: 0x08001fd8
Info : dropped 'gdb' connection

Please help to advise if it is possible to KitProg from CY8CKIT-145-40xx to program PSoC6 using mtb-programmer.

Regards,

Pong

boot程序跳转时会进入Cy_SysLib_FaultHandler。

开发工具：Modustoobox。工程为单核，CM0没有用。CM4的flash划分为BOOT和APP。

之前在开发板上做的调试版本可以正常跳转，开发板型号是：CY8CKIT-062-BLE

现在移植到我自己的板子上（芯片型号：CY8C6244LQI-S4D92）遇到问题。

我贴一下我的ld文件和Boot的Main.贴的ld文件改了下后缀，否则不能上传
现在单独烧Boot就会进去到Cy_SysLib_FaultHandler。烧了boot和app也看不到跳转。之前用开发板调测的程序就没有这个问题。可以正常跳转到app。