PSoC™ 6 Forum Discussions

the chip is  CY8C6247BZI-D54 , schematic shows the communication interface with WIFI/BT Module is SDIO ,while Can't fine any SDIO Block on CY8C6247BZI-D54

So how to make this work?

operating system: WINDOWS 10

IDE: PSoC creator 4.2

MCU: CYBLE-416045-02

SPI component version 2

PDL: 3.1.0

I am using SPI in Master mode

CPHA 0

CPOL 0

Data Rate 25000 kbps

Oversample 4

the actual data rate is 6250 ksps

if I remove MISO I can set oversample to 2 but I need MISO

I need at least a sample rate of 1200 ksps how can I increase the speed of the SPI?

is 6250 ksps the maximum sample rate?

is there a way I can override the oversample to be 2 while keeping MISO?

how can I increase my data rate?

if 6250 ksps is the top speed then why does the datasheet boast a 25000 ksps spi bus?

I have successfully ported this code example into modus toolbox 2.1 for CY8CKIT-062-BLE, modified it to report DegC for config 0 instead of mV for both channels, and it reports both ambient and die temperatures correctly.

However, when I switch device to CY8CPROTO-062-4343W the ambient temperature is correct but the die temperature is 284 DegC - I guess this is not correct otherwise the MCU would be fried and falling of the PCB 😉

If, using the device configurator, I change the SAR default VRef Select from VDD to Internal reference (from AREF resource), now the die temperature is correct (around 26 DegC when cold - increasing to 29 DegC) and the ambient temperature is always reported as 25.0000 DegC.

I thought I had come across a discussion a month or so ago in which this behaviour was explained as being due to CY8CPROTO-062-4343W being a prototype and therefore the SAR ADC was only configured on power on. I can no longer find any discussion that makes reference to this behaviour so I'm wondering if my recollection is wrong.

Can anyone clarify if it is possible to implement the functionality of CE220974 on the CY8CPROTO-062-4343W, thanks.

I would like to interface the Sterling-LWB SD Card Dev Board (450-0156 | Rev 5) to the CY8CKIT-062-WiFi-BT bypassing the WiFi chip currently used on the CY8CKIT.

I would like to do this without having to get a hardware engineer to modify the kit (soldering, etc) is this possible. I want to ensure that the existing WiFi is bypassed, disabled and not interfering. Thanks.

Does anyone have an example of how to use CY_SECTION(".cy_sflash_user_data") to prepopulate SFLASH User data?

Hi,

i have requirement of 12 bit DAC, 2 channel of OPAMP, BLE and Controller for this i have select Psoc 63 controller.

It's OK or you can suggest any other controller? also if 24 bit ADC and DeModulator will be better include in single chip?

In prog of Ble i have to send the measurement reading through ble kindly suggest which example code is better to used?

In prog of 12 bit DAC with DMA i want lockup table for 10Khz frequency or formula to calculate?

I have thinking to purchase the Bluetooth Development Tools (802.15.1) CY8CKIT-062-BLE PSoC 6 Pioneer Kit.

what is the end of lifecycle of above development kit along with its component?

Bluetooth Development Tools (802.15.1) Reference Design Kit CY5677 is no longer manufacture is it  true or not?

If yes then what is the alternative of it to purchase?

Regards,

Vaibhav

APP sends “SN+123456789012345678901234567890”,I use the customServiceData to change the device name

Hi ,

     在使用PSoC 6时，出现错误提示：

     Load region LR_FLASH size (851664 bytes) exceeds limit (524288 bytes). Region contains 138 bytes of padding and 120 bytes of veneers (total 258 bytes of linker generated content).  

     但是没有找到LR_FLASH应该如何设置，或这个空间如何分配的说明或文档，请问这个有对应的说明文档么？或者能否告知这个问题该如何解决？

Best Regards

Simon