PSoC™ 6 Forum Discussions
Is there a guide to Dual Core Debugging for the PSOC 6 within Keil uVision?
Specifically, customer needs to be debugging the CM4 and when a breakpoint is hit on the CM4, he would like the CM0+ to stop as well.
I think there are bits that need to be set for the CTI and CTM, but we cannot find the documentation on how this is done.
Show LessHello -
Another PSoC 6 crypto library question.
This page: PSoC 6 Peripheral Driver Library: Client Functions describes a pair of ECDSA functions (Cy_Crypto_ECDSA_SignHash/Cy_Crypto_ECDSA_VerifyHash), but the PDL documentation (3.1.2) for my PSoC creator install makes no mention of it.
Is this similar to the RSA 4096 bit support (coming to PDL in the future, and only on newer chips)?
Show LessI try to communicate with an RFID-Click board with SPI.
For the first touch i decide to use the low level API from Cypress.
Now i´m stuck while i try to read the ID of the Chip.
I hock up a Oscillocop on the SPI bus.
When I watch the Transfer all seems to be okay.
When I plot the Values readed from the rxBuffer I don´t get the expected results.
txBuffer[20]=0;
rxBuffer[20]=0;
void ClearSPIBuffer(){
/* CLear Master status and Tx FIFO status. */ |
Cy_SCB_SPI_ClearSlaveMasterStatus(SPI_1_HW, Cy_SCB_SPI_GetSlaveMasterStatus(SPI_1_HW)); |
Cy_SCB_SPI_ClearTxFifoStatus(SPI_1_HW, CY_SCB_SPI_TX_INTR_MASK ); |
Cy_SCB_SPI_ClearTxFifo(SPI_1_HW); |
/* Clear Rx FIFO status. */ |
Cy_SCB_SPI_ClearRxFifoStatus(SPI_1_HW, CY_SCB_SPI_RX_INTR_MASK); |
Cy_SCB_SPI_ClearRxFifo(SPI_1_HW); |
}
for Write i used:
void SPIWrite(length){
Cy_SCB_SPI_WriteArrayBlocking(SPI_1_HW,txBuffer,length);
while(!Cy_SCB_SPI_IsTxComplete(SPI_1_HW)){
vTaskDelay(0);
}
}
read i try with:
txBuffer[0]=ID_CMD;
SPIWrite(1);
ClearSPIBuffer();
txBuffer[0]=read_CMD;/*reading cmd specify by the RFID Chip*/
txBuffer[1]=0xFF;/*Send Dummy Byte for reading*/
txBuffer[2]=0xFF;
txBuffer[3]=0xFF;
...
txBuffer[16]=0xFF;
txBuffer[17]=0xFF;
SPIWrite(18);
while(Cy_SCB_SPI_GetNumInRxFifo(SPI_1_HW)!=18);
Cy_SCB_SPI_ReadArray(SPI_1_HW,rxBuffer,18);
for(uint8_t i=0;i<18;i++){
printf("recived %u: %u\r\n",i,rxBuffer[0]);
vTaskDeleay(0);
}
On the Oscilliskop i can See the Correct ID but on the Serial Consol i Just get 0x06 what is the resulst from Polling and Echo command what I´m using bevor.
I try to get the correct Code from the SPI_MAST_LOW_LEVEL example.
What do i making wrong to read from an SPI Device?
Is the rxBuffer Updatet by write with Cy_SCB_SPI_WriteArrayBlocking(SPI_1_HW,txBuffer,length) ?
Show LessHi
I am looking for a footprint/dimensional drawing for the CY8CPROTO-063-BLE board. I am looking through the documents about the kit on the website, have a general pdf (but others won't download). I haven't seen anything like a plan drawing or 3D yet. Can anyone point me to one?
Many thanks for any advice.
Show LessHi,
I got a new CY8CKIT-062-WiFi-BT. When I try to program it using the PSOC creator. It is not being listed under the targets.
What would have been the issue. I am using PSOC Creator 4.2. First thing is I wanted to rule out the issues present on board if any. Kindly help me with this.
Show LessDear Sir/Madam,
We have requiement for configurating the PSoC6 working as QSPI slave with 27MHz input clock from QSPI master.
Checked Datasheet and TRM covered the configuration of SMIF as Dual/Single QSPI Master only without stating any Slave clock input parameters like while SCB standard SPI slave.
Can anybody confirm that QSPI slave possibility on PSoC6?
Thanks and Regards,
Kevin
Show LessHi Sir,
I have some question want to ask next,
(1)PSoC6 UDB part concrete can do?
(2)what is the difference between it and CPLD or relationship, as well as the specific usage, as well as the specific how many resources, whether can realize a little more complicated point of application, to do some algorithm, its peaceful LUT lookup table of commonly used exactly is what relationship, if we can develop a serial port?
(3)Whether UDB can do sequential logic?
Thanks
Paddy
Show LessAdded the UDB PWM block for PSoC6 which provides PWM routing to every IO.
UDB's rock, don't let the magic die!
GitHub - onethinx/UDB-Components: PSoC6 UDB Components
Show LessHi,
In the below code I have tried to trigger an interrupt when the GPIO pin goes to low. I have understood that all the interrupt sources that are available can be found in the type def IRQn_Type.
1. But where do I get the Interrupt Priority ( IntrPriority ). What should be the value of it?
2. I am assuming that this is the flow for programming a interrupt. Please correct me if I am wrong.
- Initialize interrupt using Cy_SysInt_Int()
- Enable the interrupt using NVIC_EnableIRQ()
- Define the Interrupt Sub Routine.
3. Is there any documentation describing how to program and handle different types of interrupts? Example: When a FIFO is full, When ADC has captures a data, etc. It can be generic as well.
4. When I am debugging using the PSOC Creator. If I try to add watch for a variable. The value is not being displayed. It is being displayed as optimized value. Where should I modify the optimization settings to see the value of the variable added to the watch..
Show Less