In this article:
Setting Bluetooth Device Address - KBA211407
...we only cover programming the PSOC4-BLE with the SFLASH tool. Is there a similar external tool to program a customer defined address into the PSOC 6 BLE devices?
Please let the Community know!
I'm designing an oscilloscope by using psoc6. I'm looking for some similar application notes. could you want to share with me ? I saw that the kit has only one ADC and DAC.If I use two channels of ADC, will the sampling rate be reduced to half? And how do I convert the data of 2-channel ADC just with a single DAC? Do I need an external DAC?
Looking forward to receiving your answer.
I am interested in using the DSI or DSI and UDB to route IO pins to different internal peripherals such as a different SCB then the HSIOM allows direct access to. Is this possible?
The PSOC6 datasheets talks about having a Digital System Interconnect fabric and the block diagram suggests it attaches to the SCBs.
However, the architecture datasheet has no further information. except for being able to tell the HSIOM to connect the GPIO pin to the DSI network.
Thanks for the help,
We are using a CY8C62xA in 128-TQFP per "Document Number: 002-23185 Rev. *G". We have several questions that we need Cypress support with.
[ADC Channels and ADC Errata]
- Page 42, Table 15, suggests SAR ADC MAX number of SE channels is 16. We are designing using PN CY8C624AAZI. ModusToolbox configured with said PN allows Programmable Analog 12-bit SAR ADC Peripheral to be configured for 16 SE channels and shows/enables channels 0-15 options but only P10-P10 are selectable within each channel. Where are the other 8 channels? This would also apply to differential mode similarly... i.e. 16 channels needed for 8 channel differential....where are the remaining 8?
- Page 69, Errata Section with table title "3. Switching noise can cause ADC errors due to voltage reference noise." Suggests that: "......including the SAR ADC, is connected to Ports 9 and 10." are the missing channels actually on Port 9? Not yet implemented in ModusToolbox?
- Please help me understand the use of your term "Switching". Are we strictly speaking digital switching or what of the switching inherent to ADC sampling? For example: If we assume that all 16 ADC channels entirely exist on ports 9 and 10 such that we use ports 9 and 10 strictly for ADC with all channels "simultaneously sampling" will we see a 4 count LSB error or a 12 count LSB error on ADC? Or otherwise if we have only 8 channels on port 10 all used as simultaneous ADC are we looking at 4 count LSB or 12 count LSB? etc..??
For my application, I need to send a 32-bit value (a pointer, to be specific) for the M4 core to the M0+ core. I need to lock access to the memory pointed to by this pointer until the receiving end has processed the data. The acquire and release mechanism in the IPC subsystem on the PSoC 6 seems like a perfect way to do that. Unfortunately, as far as I can tell from the documentation, the IPC Pipe APIs provided in the PDL ignore this mechanism, so to achieve what I need to do, I need to use the IPC DRV APIs.
What those APIs are missing, though, is the ability to actually configure an IPC interrupt and set an ISR address for it. I've spent a lot of time looking through the PDL code and can't figure out what needs to be in the structure that's passed to Cy_SysInt_Init().Show Less
I am attempting develop a project that passes temperature and humidity data from one PSoC 6 device to another, with the data in the form of strings.
To achieve this i have added extra functionality to the Find Me project. Currently, I have created a custom service for a peripheral device that reads "Hello World" from the PSoC to the CySmart Android Application.
I want to send a byte (eventually evolving into a string for UART output) in the opposite direction that will simply light an LED (or something else). I have ran into a wall and am not sure how to develop the write event handler.
Any help would be appreciated, I understand this might be a rudimentary task but I just can not figure out what I am meant to do next.
I used Psoc Programmer command line (ppcli) to change the lifecyle of the PSoC 6 BLE Prototyping Kit (CY8CPROTO-063-BLE) from normal to secure with debug
I did the following steps:
I can confirm that the lifecycle changed using Psoc Programmer GUI, I can also read and write hex files to the kit.
but the problem is that the kit is not working any more.
Is there something that I am missing, my goal was to protect the hex from being illegally read from the flash by the customer after delivering the kit.Show Less
I am new working with PSoC 6 and BLE. The security configuration of the BLE I found it can be either Mode 1 or Mode 2 but I dont know what these modes are. Futhermore, I want to use the encryption as security level but I dont have also information about it If you could provide me some Documentation about PSoC 6 and PSoC Creator, it would be great!
Thank you all
@ll FORTH programmers and those who want to become:
From 17. August to 18. August 2019 is the Maker Faire in Hannover. In this Time will the German FORTH-Gesellschaft show all implementations of Mecrisp-Stellaris-FORTH on PSoC4 and PSoC5*. FORTH is a compiler language with an interpreter and make interactive C possible. You can see the whole workflow to programming PSoC4/5 in FORTH combined with C-API's. For more Information search to 'FORTH' on this page or follow this link: https://sourceforge.net/projects/mecrisp/files/Cypress/
*Mecrisp-Stellaris-FORTH is available for following Eva-Kits:
CY8CKIT-043 -> cy8c4247azi
CY8CKIT-046 -> cy8c4248bzi
CY8CKIT-049 -> cy8c4245axi
CY8CKIT-050 -> cy8c5868axi
CY8CKIT-059 -> cy8c5888lti
FreeSoC2 -> cy8c5888axiShow Less