The CY8CPROTO-063-BLE board is being used with hibernate and periodic alarms to save system power. The RTC is producing the expected alarms and the h...
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The CY8CPROTO-063-BLE board is being used with hibernate and periodic alarms to save system power. The RTC is producing the expected alarms and the hibernate control is working properly. There is an external PMIC with an enable input to turn it on and off to generate the 3.3V input for the VDD . A supercap is attached to VBACKUP and R29 is removed on the board. When the unit is also powered from the KipProg3 adapter (via VTARG) it works as intended, hibernating and waking up periodically. However, When the KitProg3 is unpowered and the external power is only applied into the PMIC, it never gets out of hibernation.
The problem is that pin P0.5 is not being controlled by the hibernate logic as needed. The PMIC enable (active high) is pulled high by a weak pull-up resistor for when the PSoC 6 is not yet powered or not yet in control ( P0.5 assumed high impedance). When hibernate mode is started, P0.5 should be pulled low by the PmicEnableOutput and when it goes out of hibernate, it should be pulled high to turn the external PMIC on. This is not happening.
In response to the forum question "PSoC 6 PMIC Control deep sleep best practise", GaneshD_41 replied suggesting control that is built into the following code:
Cy_SysPm_SetHibWakeupSource( CY_SYSPM_HIBALARM // Wake-up source for RTC alarm
| CY_SYSPM_HIBPIN1_LOW // Wake-up source for Pin1 input low
);
Cy_SysPm_PmicUnlock(); // Unlock in case locked
//NU Cy_SysPm_PmicEnable(); // enable Pmic control
Cy_SysPm_PmicEnableOutput(); // enable P0.5 output control
Cy_SysPm_PmicLock(); // Lock again but why?
// Configure the PMIC controller output pin to be active logic low
// after the PMIC is disabled.
// Note: I do not understand the above comment
Cy_GPIO_SetDrivemode(P0_5_PORT, P0_5_PIN, CY_GPIO_DM_STRONG_IN_OFF); // What does this do?
Cy_GPIO_Clr(P0_5_PORT, P0_5_PIN); // What does this do?
if ( Cy_SysPm_PmicIsOutputEnabled() ) // It was just enabled above; so why check?
{
Cy_SysPm_PmicUnlock();
Cy_SysPm_PmicDisable(CY_SYSPM_PMIC_POLARITY_LOW); // what does this do?
}
// Prepare the device for system Hibernate
if ( Cy_SysPm_SystemEnterHibernate() != CY_SYSPM_SUCCESS )
{
/* System did not enter Hibernate mode because a registered
* Hibernate "check ready" callback returned a "not success" status
*/
printf(" Hibernate failed\r\n\n");
Cy_SysLib_Delay(1000); // wait for output
failed= 1;
}
The above code was put into the project; yet P0.5 still does not have any output; it always stays low.
Are there any suggestions as to properly controlling the P0.5 pin while going into and out of hibernation?
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Mar 8, 2021
Solved
