PSoC™ 6 Forum Discussions
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Hi,
So in my previous question, I could manage to measure interval of external IRQ signal.
https://community.cypress.com/t5/PSoC-6-MCU/PSoC-6-Measuring-IRQ-interval/m-p/279015#M10056
But then the customer wants to use a PSoC 6 without UDB. >_<
So I changed the strategy to get the capture value in the ISR,
and take care of the handling from software.
I changed the schematic something like
And in the ISR I "tried" to clear interrupt flag as below
void sensor_irq1_isr(void)
{
uint32_t source ;
source = Counter_1_GetInterruptStatus() ;
if ((source & CY_TCPWM_INT_ON_CC) != 0) {
Pin_2_Write(1) ;
sensor1_period = Counter_1_GetCapture() ;
sensor1_flag = 1 ;
}
NVIC_ClearPendingIRQ(SysInt_1_cfg.intrSrc) ;
Cy_TCPWM_ClearInterrupt(Counter_1_HW, Counter_1_CNT_NUM, source) ;
// Counter_1_Disable() ;
}
But this ISR seems to be called repeatedly.
The upper yellow signal is from CY8CKIT-044.
The lower purple signal is written to 1 inside ISR and cleared in the main loop.
So although I'm expecting seeing only 1 pulse around the falling edge of the input signal,
my CY8CKIT-062-BLE has been generating interrupts repeatedly.
I spent whole day today, but in vain. (T^T)
Probably I'm missing or misunderstanding something...
Now my question is what is the proper method to clear interrupt of TCPWM (Capture)
and reload the counter (TCPWM) to count next interval?
main_cm4.c
#include "project.h"
#include "stdio.h"
#include "tty_utils.h"
volatile int32_t sensor1_period = 0 ;
volatile int sensor1_flag = 0 ;
void Pin_2_Write(int v)
{
Cy_GPIO_Write(Pin_2_0_PORT, Pin_2_0_NUM, v) ;
}
void sensor_irq1_isr(void)
{
uint32_t source ;
source = Counter_1_GetInterruptStatus() ;
if ((source & CY_TCPWM_INT_ON_CC) != 0) {
Pin_2_Write(1) ;
sensor1_period = Counter_1_GetCapture() ;
sensor1_flag = 1 ;
}
NVIC_ClearPendingIRQ(SysInt_1_cfg.intrSrc) ;
Cy_TCPWM_ClearInterrupt(Counter_1_HW, Counter_1_CNT_NUM, source) ;
// Counter_1_Disable() ;
}
void sensor_irq1_init(void)
{
#if 0
const cy_stc_sysint_t SysInt_1_cfg = {
.intrsrc=(IRQn_Type)SysInt_1__INTC_NUMBER,
.intrPriority = SysInt_1__INTC_CORTEXM4_PRIORITY
} ;
#endif
Cy_SysInt_Init(&SysInt_1_cfg, sensor_irq1_isr) ;
NVIC_ClearPendingIRQ(SysInt_1_cfg.intrSrc) ;
NVIC_EnableIRQ((IRQn_Type)SysInt_1_cfg.intrSrc) ;
}
void init_hardware(void)
{
__enable_irq(); /* Enable global interrupts. */
Pin_2_Write(0) ;
tty_init() ;
sensor_irq1_init() ;
Counter_1_Start() ;
}
int main(void)
{
int32_t prev_period = -1 ;
int32_t period = 0 ;
int32 count = 0 ;
char fun[] = { '|', '/', '-', '\'' } ;
int fun_index = 0 ;
init_hardware() ;
cls() ;
splash("PSoC 6 Interval Timer Test") ;
// Counter_2_Start() ;
for(;;)
{
if (sensor1_flag) {
Pin_2_Write(0) ;
period = sensor1_period ;
sensor1_flag = 0 ;
Counter_1_TriggerReload() ;
// Counter_1_Enable() ;
#if 0
if (prev_period != period) {
snprintf(str, STR_BUF_LEN, "Sensor1: %d\n\r", period) ;
print(str) ;
prev_period = period ;
CyDelayUs(100) ;
} else {
count++ ;
if (count > 100) {
count = 0 ;
fun_index = (fun_index + 1) % 4 ;
snprintf(str, STR_BUF_LEN, "\b%c", fun[fun_index]) ;
print(str) ;
}
}
#endif
}
}
}
Any suggestions and/or corrections will be appreciated.
moto
Show Less2 Questions on PSoC 64:
1. Do we have ISO7816 driver to connect to a smart card
2. Do we have an Application note to implement Bulk Encryption/decryption in PSoC64?
Show LessThis is a follow up from https://community.cypress.com/t5/PSoC-6-MCU/MCWDT-Interrupt-not-working-as-Deep-Sleep-wakeup-source-in/td-p/120769. I work with @RaMu_4639021 and we're continuing to track down the same issue, but I can't reply on that post. Our idle thread looks roughly like:
uint32_t int_status = Cy_SysLib_EnterCriticalSection();
eSleepModeStatus eSleepStatus = eTaskConfirmSleepModeStatus();
if (eSleepStatus != eAbortSleep )
{
Cy_SysPm_DeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT);
}
Cy_SysLib_ExitCriticalSection(int_status);
It's important that interrupts remain disabled between the calls to eTaskConfirmSleepModeStatus and Cy_SysPm_DeepSleep(). However, if we execute Cy_SysPm_DeepSleep() in a critical section, the device will hang while executing Cy_BLE_DeepSleepCallback(). If we never start the BLE component (so the BLE component never registers a call back with Cy_SysPm_RegisterCallback()), then the device sleeps and wakes up as expected. Is it possible to configure Cy_BLE_DeepSleepCallback() so that it can be called in a critical section?
Show LessSorry to disturb everyone.
I encountered a difficult problem.
In Psoc6, how to configure the pins in port9 as SAR AD pins without generating DSI interrupts. What I configured will always generate DSI interrupts, so the program enters Cy_HALT() .
Thank you very much for your help
Show LessHi everyone, excuse me.
I have an urgent question.
After Modus is compiled, the RAM usage size will be displayed. I found that the same code, on modus, the heap usage is very large, but it is very small on other compilers, so that my SRAM on MODus is about to exceed.
Total Internal SRAM (Available) 292864
Total Internal SRAM (Utilized with heap) 279920
thanks for your help
Show LessHello,
I am using a CY8C6347BZI-BLD53 and ble connections are working well with iOS and Android clients. However, establishing a BLE connection with windows is unreliable; sometimes it works, some times it doesn't. I've used a protocol analyzer to capture the BLE traffic while establishing a connection with windows and have found that when a connection doesn't work, the PSoC6 doesn't acknowledge the LL_FEATURE_REQ sent by the windows radio and the windows radio retransmits that packet until the connection times out. What could cause this behavior?
I've attached a couple of screenshots of the packet trace showing the issue. Frame 8,308 is the connection indication and it is immediately followed by the LL feature request on frame 8,309. Frame 8310 doesn't acknowledge frame 8,309 and then it gets retransmitted a lot of times, never being acknowledged by the PSoC6. I'm happy to upload the full packet trace to a non-public forum, it contains both successful and unsuccessful connections.
Thanks,
Theo
Show LessHi,
I am using Toshiba NAND flash with CY8CKIT-062S2-43012. I am using this flash for OTA using HTTP with the sample application. The bin file is downloaded to NAND flash. The download is successful. After the download the board reboots and reads magic number, swap_type, image_ok flag and copy_done flag. The function boot_write_copy_done() is supposed to write the copy_done flag. Can you tell me where is it getting called in the flow?
Reboot happens after OTA and then it results in following error:
[ERR] ********No bootable image in slot
Please find the attached screen shot
Should I update any variable in the code, so that the bootloader should look for image in the Toshiba NAND flash instead of the default QSPI NOR flash?
Also please tell me the steps carried out during validation of image in secondary slot. Do you have any documents or links regarding this?
Any information will be of great help.
Thanks,
Binsy M S
Show LessOriginally, there was no problem. Suddenly, the code could not be downloaded. The following is info:
Started by GNU MCU Eclipse
Open On-Chip Debugger 0.10.0+dev-4.1.0.1058 (2020-08-11-03:47)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
adapter speed: 2000 kHz
adapter srst delay: 25
adapter srst pulse_width: 25
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
cortex_m reset_config sysresetreq
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.21.1005
Info : KitProg3: Pipelined transfers enabled
Info : VTarget = 3.328 V
Info : kitprog3: acquiring the device...
Error: kitprog3: failed to acquire the device
Info : clock speed 2000 kHz
Error: DAP 'psoc6.cpu' initialization failed (check connection, power, etc.)
Info : psoc6.dap: powering down debug domain...
Warn : Failed to power down Debug Domains
Hi,
Currently I am testing aws_demos example in ModusToolbox2.2.
When I was using CY8CPROTO-062-4343W Rev06(IC marked with A33), I am able to reprogram and switch between different projects.
But when I changed to CY8CPROTO-062-4343W Rev08(IC marked with B33), I only programmed once and it seems the program had not been properly flashed into the board. The debug port was totally shut down and I cannot reprogram any more.
Even when I pressed SW3 to switch mode, also can not do it. It will go back to "KitProg3 CMSIS-DAP" in device manager. Please refer to the attached picture. I already killed several Rev08 boards when I was trying to program aws_demos into these Rev08 Boards.
Below is the log from Cypress Programmer when I'm trying to connect.
Please help to analyze and debug. Thank you very much.
Show Less
I am using the CY8CKIT-062-Wifi-BT Pioneer kit which comes with the CCG3 Type-C controller. By default, the Type-C connection acts as a PD power source.
I would like to know how to control CCG3 controller using Modustoolbox. To be more specific, I would like to have some reference source code that is able to control the CCG3 as and when it will supply power to another PD device.
Can you show me any reference code, library or HAL that communicate with the CCG3 controller in Modustoolbox environment?
Thanks.
Show Less