PSoC™ 6 Forum Discussions
Hi,
In my app, I was enable a rtc alarm interrupt with every second, and it was working. But when I want to disable this interrupt, it working in the end, but there was an unexpected interrupt happened.
diable interrupt method:
bk = Cy_RTC_WriteEnable(CY_RTC_WRITE_ENABLED);
BACKUP_ALM1_DATE=0;
Cy_RTC_WriteEnable(CY_RTC_WRITE_DISABLED);
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Hi,
I notice a current increase from 70 mA to 130 mA on the 5V supply side when the user button is pressed on the CY8CPROTO-062-4343W prototyping board.
Is this normal behavior and what is the reason for this?
The current through R24 / R22 should only be 0.33 mA while the button is pressed.
This was measured while running the Hello_World example from project-creator (with LED off). If user button is pressed while reset button is also pressed the current rises from 63 mA to 123 mA, so still an 60 mA increase while user button is pressed.
Thanks for advice and best regards,
TG19
Hello! I'm currently developing application using Psoc 63 and part of it requires storing last n scan results in array inside CY_BLE_EVT_GAPC_SCAN_PROGRESS_RESULT event for further processing. Part of code so far:
void StackEventHandler(uint32 event, void *eventParam)
{
cy_stc_ble_gapc_adv_report_param_t * advReport;
cy_stc_ble_gapc_adv_report_param_t * advReport_arr[10]; //Can store 10 devices adv data
uint8_t scanState = Cy_BLE_GetScanState();
switch (event)
{
/* This event is received when the BLE stack is initialized and turned ON.*/
case CY_BLE_EVT_STACK_ON:
{
printf("CY_BLE_EVT_STACK_ON \r\n");
Cy_BLE_GAPC_StartScan(CY_BLE_SCANNING_FAST,CY_BLE_OBSERVER_CONFIGURATION_0_INDEX);
break;
}
case CY_BLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
/* scan progress result event occurs
* when it receives any advertisiment packet
* or scan response packet from peer device*/
advReport = (cy_stc_ble_gapc_adv_report_param_t *)eventParam;
advReport_arr[i] = (cy_stc_ble_gapc_adv_report_param_t *)eventParam;
printf("i %i \n",i);
printf("CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:\r\n");
/* PEER Device address type */
printf("peerBdAddr: %2.2x%2.2x%2.2x%2.2x%2.2x%2.2x \r\n",
advReport->peerBdAddr[5u], advReport->peerBdAddr[4u],
advReport->peerBdAddr[3u], advReport->peerBdAddr[2u],
advReport->peerBdAddr[1u], advReport->peerBdAddr[0u]);
if (i == 10){
for (int k = 0; k<10; k++){
printf("i = %ipeerBdAddr: %2.2x%2.2x%2.2x%2.2x%2.2x%2.2x \r\n",k,
advReport_arr[k]->peerBdAddr[5u], advReport_arr[k]->peerBdAddr[4u],
advReport_arr[k]->peerBdAddr[3u], advReport_arr[k]->peerBdAddr[2u],
advReport_arr[k]->peerBdAddr[1u], advReport_arr[k]->peerBdAddr[0u]);
}
i=0;
}
printf("_______________\n");
i++;
break;
I have defined array cy_stc_ble_gapc_adv_report_param_t * advReport_arr[10] and my understanding is that every time scan progress result event occurs I store result in advReport_arr[i] = (cy_stc_ble_gapc_adv_report_param_t *)eventParam;
after event is complete I increment i. Unfortunately this outputs:
_______________
i 1
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 71f23d004fdb
_______________
i 2
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 7d4ce49f4e4e
_______________
i 3
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 0bbf76ef24ac
_______________
i 4
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 04602584dce3
_______________
i 5
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: bc7e8ba0990f
_______________
i 6
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 71f23d004fdb
_______________
i 7
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 04602584dce3
_______________
i 8
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 7d4ce49f4e4e
_______________
i 9
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: 0bbf76ef24ac
_______________
i 10
CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT:
peerBdAddr: d0d0030e8f4d
i = 0peerBdAddr: d0d0030e8f4d
i = 1peerBdAddr: d0d0030e8f4d
i = 2peerBdAddr: d0d0030e8f4d
i = 3peerBdAddr: d0d0030e8f4d
i = 4peerBdAddr: d0d0030e8f4d
i = 5peerBdAddr: d0d0030e8f4d
i = 6peerBdAddr: d0d0030e8f4d
i = 7peerBdAddr: d0d0030e8f4d
i = 8peerBdAddr: d0d0030e8f4d
i = 9peerBdAddr: d0d0030e8f4d
I'm getting different advertisement data every CYBLE_EVT_GAPC_SCAN_PROGRESS_RESULT, but when i reaches 10 I print entire array but it turns out only last (i=10) peerBdAddr is stored in all elements of array.
What is problem with my code and what should I do to see last 10 devices when I print advReport_arr ?
Thanks!
Show LessHi,
I am wondering:
1. What is the difference between CYS0644A an CYB044A models?
2. Is there any development boards available for these devises?
Best regards,
Michael
Show LessNow we are in the process of designing a PCB and we are making additional requests.
Due to the small pitch size of CY8C6137FDI mcu
I need information about mcu's layout guidelines. (related to wlcsp-81)
The information you need is a datasheet or artwork guideline with the layout signal trace width, pin and trace clearence information, etc.
Thank you.
Show LessI have implemented an SPI master using the PSOC Creator tool, v4.4, PDL 3.1.4
The SPI master works intermittently; sometimes when I call the Cy_SCB_SPI_Transfer function, the processor is stuck in the
Cy_SysLib_ProcessingFault()
Function.
Are there any known issues with the SPI master component?
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Hi,
I have custom designed a board having CY8C6137BZI-F14 chip. I have made the connection as per the diagram attached. I am using MiniProg3 programmer (10 Pin Connector). It is able to detect the power but unable to acquire the port. I have attached the reference pictures for clear understanding.
I tried all modes, SWD, JTAG, Reset Mode, Power Cycle Mode, Lowering the Frequency, nothing worked.
Can Anyone Help?
-Kevin
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Hi,
I am doing a simple flash erase write read operation on the CY8CPROTO-062S3-4343W PSOC6 kit.
I am following the exact code snippet shown in the below link.
https://cypresssemiconductorco.github.io/psoc6hal/html/group__group__hal__flash.html.
I can read the flash info via the cyhal_flash_get_info function. But erase and write operations are not happening.
I tried both blocking and nonblocking erase and write. Both weren't successful.
0x4020900 - This is the error code is returned from the cyhal_flash_start_write and cyhal_flash_start_erase finctions.
Could you help me to resolve this problem?
Thank you!
Show LessHI,
I have built a custom board following the layout of most external devices in CY8CPROTO-062-4343W, but with a different MCU CY8C6247BZI-D34 because the one in the prototyping board is nowhere to be found in the market. I'm trying to create the custom BSP following the steps of KBA230822 but towards the end of the creation I get this error message:
Running device-configurator for CY8C6247BZI-D34...
ERROR: Generating code failed. Code generation errors:
- Errors exist in the project's configuration:
'srss[0].clock[0].pathmux[5]' does not exist on the device but has an instantiated personality, 'PATH_MUX-1.0'.
examining the content of design.modus in the three places:, the orginal BSP from the proto kit , the generic BSP, and the created custom BSP, they all have that clock setting.
I did update libraries, delete and recreated the custom BSP but there is no change. Always get stuck at the same point.
How can I fix this to move on?
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Hello All,
I am trying to program a PSOC6 MCU board (CY8CPROTO-064S1-SB). I am able to successfully compile the software and start the flashing process.
However, the board shuts down after that. The terminal prints a message that there is an error during bootloader flow (image attached).
I get a warning message during the flash process that the board is pre-production version and the current software is incompatible (image attached).
Can someone please help me with this problem? Is there any work-around that I can use to successfully program the board?
ModusToolbox version - 2.3.1
Cysecuretools version - 3.1.0
I got a warning message to upgrade the firmware version during the flashing process, which I did from 1.27.707 to 2.21.1005.
/*************************CONSOLE LOG************************************/
Open On-Chip Debugger 0.10.0+dev-4.2.0.1430 (2021-03-05-08:22)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
** Main Flash size limited to 0xD0000 bytes
adapter speed: 2000 kHz
adapter srst delay: 0
adapter srst pulse_width: 5
Info : auto-selecting first available session transport "swd". To override use 'transport select <transport>'.
** Using POWERUP_DELAY: 5000 ms
** Using TARGET_AP: cm4_ap
** Using ACQUIRE_TIMEOUT: 15000 ms
** Auto-acquire enabled, use "set ENABLE_ACQUIRE 0" to disable
Info : Using CMSIS loader 'CY8C6xxx_SMIF_S25Hx512T' for bank 'psoc64_smif_cm4' (footprint 11612 bytes)
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Warn : SFlash programming allowed for regions: USER, TOC, KEY
Info : CMSIS-DAP: SWD Supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 0 TDO = 0 nTRST = 0 nRESET = 1
Info : CMSIS-DAP: Interface ready
Info : KitProg3: FW version: 2.21.1005
Info : KitProg3: Pipelined transfers enabled
Info : VTarget = 3.315 V
Info : kitprog3: acquiring the device (mode: reset)...
Info : clock speed 2000 kHz
Info : SWD DPIDR 0x6ba02477
***************************************
** Use overriden Main Flash size, kb: 832
** Silicon: 0xE262, Family: 0x100, Rev.: 0x24 (B3)
** Detected Device: CYB06447BZI-D54
** Flash Boot version: 4.0.0.9
Warn: Pre-production version of device is detected which is incompatible with this software
Warn: Please contact Cypress for new production parts
***************************************
Info : starting gdb server for psoc64.cpu.cm4 on 3333
Info : Listening on port 3333 for gdb connections
Info : Deferring arp_examine of psoc64.cpu.cm4
Info : Use arp_examine command to examine it manually!
Info : kitprog3: acquiring the device (mode: reset)...
Info : Waiting up to 15.0 sec for the bootloader to open AP #2...
Info : Waiting up to 15.0 sec for the handshake from the target...
Warn : No handshake from the target, continuing anyway
Info : psoc64.cpu.cm4: external reset detected
psoc64.cpu.cm4 halted due to debug-request, current mode: Thread
xPSR: 0x61000000 pc: 0x1600400c msp: 00000000
** Programming Started **
auto erase enabled
Info : Padding image section 0 at 0x1001ba6e with 402 bytes (bank write end alignment)
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wrote 113664 bytes from file C:/../ModusPatch1/Hello_World/build/CY8CPROTO-064S1-SB/Debug/mtb-example-psoc6-hello-world.hex in 6.364500s (17.440 KiB/s)
** Programming Finished **
** Program operation completed successfully **
srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst
Info : Deferring arp_examine of psoc64.cpu.cm4
Info : Use arp_examine command to examine it manually!
Info : Waiting up to 15.0 sec for the bootloader to open AP #2...
Warn : psoc64.cpu.cm4: external resume detected
shutdown command invoked
Info : psoc64.dap: powering down debug domain...
/**********************************************************************************/
(Link to earlier issue - Solved: Re: Open OCD SWD/JTAG error for CY8CPROTO-064S1-SB... - Cypress Developer Community)
Sincerely,
Aditi Prakash
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