PSoC™ 6 Forum Discussions

I have been slogging through getting my FreeRTOS system to go into and come out of deep sleep. Of course, the system works perfectly when connected to the debugger (which makes the system only go into sleep instead of deep sleep). But things go wonky when the debugger is not connected. Since I can't use the debugger to the debug the problem, I've had to resort to using LEDs on my board to give me some clues as to where the system is going off the rails. 

TurnOnYellowLed();

// Go into low-power deep sleep state. The only thing that can wake us
// back up is an expander interrupt.
Cy_SysPm_CpuEnterDeepSleep( CY_SYSPM_WAIT_FOR_INTERRUPT );

vTaskDelay(3000);
TurnOffYellowLed();

Pushing the on/off button creates an "expander interrupt" that wakes up the system. Now (extra weirdness) the system seems to wake up correctly the very first time it goes to deep sleep after a cold start and the yellow LED stays on for about 3s after the wake-up interrupt. But on subsequent trips through this code, the vTaskDelay does not work and the yellow LED turns off immediately after the interrupt starts the system (and a see lots of other timing-related misbehavior in the code that follows).

I have experimented with setting configUSE_TICKLESS_IDLE to 1 because it seemed like it could be related to the problem, that that didn't fix anything.

Anybody have any ideas as to what I am doing wrong here?

Thanks,

Ed H.

I am new to the Infineon/Cypress ecosystem. Please be patient with me.

I have a CY8PROTO-062-4343W PSoC 6 board and am using Eclipse IDE for ModusToolbox.

What I am trying to create is a composite USB device based on PSoC 6. I need two in/out audio channels and two CDC ports. I think I know what I have to do. I get the general idea of a composite device. I need to remove the HID part, add two CDCs, and add three IADs: one for the audio part and one for each CDC.

I found a post that is related to what I am trying to do: https://community.infineon.com/t5/PSoC-6/USB-Composite-device-Audio-CDC/m-p/290605 I am also trying to use USB_Audio_Device_FreeRTOS as a starting point, and while I need two CDCs, even one would be a good starting point. The proposed solution was a descriptor in an XML format. I tried manually copying it to the USB Configurator and, sadly, failed:

1) In the top level descriptor, the XML contains the following values:

<bDeviceClass>0x00</bDeviceClass>
<bDeviceSubClass>0x00</bDeviceSubClass>
<bDeviceProtocol>0x00</bDeviceProtocol>
The USB Configurator complains (as far as I can tell, correctly) that the values should be 0xEF, 0x02 and 0x01, respectively. It does not let me save the configuration until I enter the required values.

2) Both audio and CDC try to use endpoint EP2 IN and the USB configurator complains again. I had to change the CDC endpoint to EP5

Even with these changes, it does not work. Windows 10 says "This device cannot start. (Code 10){Operation Failed} The requested operation was unsuccessful."

What am I doing wrong?

Thanks!
Bart

I am developing on a CYBLE-416045 BLE module. CM0 is just running the BLE stack and responds to pipe commands from the CM4 to wake up or go to sleep. Right now CM0 is going to DeepSleep.

Now, when if I put the CM4 into Sleep, everything works fine. CM4 wakes up when a GPIO interrupt is generated by a push button. 

If I put the CM4 into DeepSleep, CM4 still works fine as long as the debugger is connected. The system kicks on when the button is pushed (as expected). Once the system has started-up with the debugger connected, I can even pull the plug to the debugger and the system will still sleep/wake up like it should.

But... If I then do a cold start WITHOUT the debugger connected, the push button interrupt will NOT wake up the system. 

I don't have a clue why the system will wake-up from deep sleep when it is started up using the debugger and will not wake up when started without the debugger. Has anybody else seen this? Any tips on how to fix the problem?

And I'm pretty sure its not a problem with an individual module. I've seen it in multiple different units.

Thanks,

Ed H.

Good afternoon
I have the question about PSoc 63 microcontroller, specifically about the "Table 8. Multiple Alternate Functions". ACT #7 from https://www.infineon.com/dgdl/Infineon-PSoC_6_MCU_PSoC_63_with_BLE_Datasheet_Programmable_System-on-Chip_(PSoC)-DataSheet-v16_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee4efe46c37. My particular quesion comes for the notation IPName[x].signal_name[u]:y.  About the scl and sda signals, the "y" in nomenclature is not very clear for me according to the note 2 in the part  "For example, the name tcpwm[0].line_compl[3]:4 indicates that this is instance 0 of a tcpwm block, the signal is line_compl # 3 (complement of the line output) and this is the fourth occurrence (copy) of the signal. Signal copies are provided to allow flexibility in routing and to maximise utilisation of on-chip resources." Can I acces to the same sda and scl signals from pin 6.4 and 6.5 directly from pin 9.0 and 9.1? Are they going to be the same signals as they are copies?

Using https://infineon.github.io/dfu/dfu_sdk_api_reference_manual/html/index.html#ssection_dfu_step_4 

App1 will not compile:

• address 0x10061090 of ...elf section `.text' is not within region `flash_app1'
• section `.ARM.exidx' will not fit in region `flash_app1'

The dfu_cm4_app1.ld file provided has:

flash_app0 (rx) : ORIGIN = 0x10002000, LENGTH = 0x10000
flash_app1 (rx) : ORIGIN = 0x10050000, LENGTH = 0x10000
flash_boot_meta (rw) : ORIGIN = 0x100FFA00, LENGTH = 0x400

I think this is wrong, for 2 reasons:

1. There is wasted flash between  0x10012000 and 0x10050000
2. The 1MB flash is not fully used. App1 should extend to flash_boot_meta 0x100FFA00

Therefore, I believe the correct line is

flash_app1 (rx) : ORIGIN = 0x10012000, LENGTH = 0xEDA00

Questions:

1. Is there any reason to leave the 0x10012000 and 0x10050000 unused?
2. Is the new size valid?
3. Does the change only have to be made in the dfu_cm4_app0.ld, and dfu_cm4_app1.ld files, or which others?

Hi,

我在用PSoC63开发 BLE OTA 时发现，OTA后，APP1程序在初始化阶段就卡住了，我在UART初始化函数后通过串口打印反馈信息，但什么都收不到。APP0单独使用时不会出现问题，能够正常广播、连接、升级。

请问一般什么原因会导致这种情况？

单纯的例程CE216767在我的板子上能够正常使用。

IDE: PSoC Creator 4.2; PDL: 3.1.0

BR.

Hunt

Looks like there is no stock for the PSoC6 family. We currently are using CY8C6247BZI-D54 on 2 boards. We can't locate stock on those. We have designed these boards to accept a CY8C6447BZI-D54 and have never been able to find those except on a development kit.

Is there any estimate as to when these parts will be available? Newark says 8/15/2022. Digikey does give an estimate.

Thanks!

I am developing a product using the CYBLE-416045-02 module.
When nothing needs to work, both CM4 / CM0 + CPUs are DeepSleep using Cy_SysPm_DeepSleep.

In rare cases, the MCU will restart in Cy_SysPm_DeepSleep.
I found that it restarts at the following points of EnterDeepSleepRam.

/ * The CPU enters Deep Sleep mode upon execution of WFI / WFE * /
SCB_SCR | = SCB_SCR_SLEEPDEEP_Msk;

I have modified what is in KBA229335.

The frequency of occurrence varies depending on the individual.
It does not reproduce at all in one individual, but it reproduces 100% in another individual.

Are there any other similar reports?
Also, please give me some advice on how to solve this problem.