PSoC™ 6 Forum Discussions

Hi,

Does the PSoC6 device support USB 2.0 compliance test mode?

Could you teach me the procedure to enter the test mode for PSoC?

I can't find out it in the Architecture and Registers TRM.

MPN: CY8C6137BZI-F34

Best regards,

Naoaki Morimoto

Hello everyone,

I am currently studying the effect of different reload intervals on the SysTick Timer running at different frequencies using interrupts. The code is very basic and simple, estimating the time to execute  CyDelay(1000) on the CM0+ and CM4. Ideally the output value should be (1000 ms +/- clock accuracy  of 1%) but I am seeing a deviation of approx. -ve 7.15% in the result (928-929) for both CM0+ and CM4 running at 100KHz with reload interval of '10'. This means I read the time values in 100microsecond steps.  I have also tested the code with multiple delay values (50,250,500,2000,etc), the result however is still a negative deviation. eg.) a delay of 1000ms is executed in 929ms which is weird.

The deviation increases to approx -45% when the reload interval is changed to '1' with the same clock frequency of 100KHz.

Please find the code attached along with the output. Could anyone please help me with the same ?

Can't seem to figure out what exactly is wrong with these specific configurations of clock and reload interval that it is giving erroneous result.

Thanks in advance.

Hello, I am making a custom board using CY8C6136.

While looking at the TRM documentation, you should use Clock with a 0.25% error rate in USB Device mode and there was also a way to use IMO below.

If so, does it mean that the error rate is about 0.25% when using USB using IMO?

I wonder what the error rate is when operating USB using IMO. Also, if the error rate is very high, I would like to know how to adjust it.

Thankyou for your apply

Hi Community,

I have a question about Keil uVision.
According to the ModusToolbox user guide, "Warning: No section matching pattern" occurs.

* Test screenshot

Q1) What causes these warnings? I want to know the cause.
Q2) If I don't follow the ModusToolbox guidelines (suppress warning), will there be any problems?
Can I ignore the warning?

Thanks and Regards,
YS

Hello,

We are developing a product that uses a PSoC 6 (CY8C6347FMI-BLD53 to be exact) and we are encountering resets caused by the WDT firing (presumably because our code is hanging somewhere). We have the WDT configured to fire after 5000ms and the software is setup to kick the WDT every 1000ms.

Other processors we have used in the past have had a "WDT warning" interrupt that fires a short period of time before the actual reset occurs that we implemented an ISR for that would grab the contents of the stack in an attempt to narrow down what part of the code was possibly hanging and causing the WDT to fire. Unfortunately the PSoC 6 doesn't appear to have this functionality, instead the WDT interrupt just fires when there is a "counter match" and then it resets on the 3rd consecutive interrupt.

We have tried to implement some code to catch the WDT interrupt and keep track of how long it has been between interrupts to emulate what the WDT peripheral does, but this is not working reliably enough to allow for determining what is causing the WDT to fire.

Are there any suggested ways to narrow down what is causing the WDT resets to occur?

Hi Community,

I had programmed CY8CKIT-062-BLE PSoC 6 BLE Pioneer Kit  with the code example (High_Level_SPI_Master) for SPI.

My hardware setup is according to below.

After that I pugged the CY8CKIT-062-BLE kit board into your computer’s USB port and chose Debug > Program(core CM0P then CM4). According to the code LED should be blinking, but It's not working. What should I do?

Where am I wrong? Can anyone help me?

Thanks.