I am working on the CY8CKIT-064S0S2-4343W kit.
As I want to work on peripherals on this device I have tried to import examples from Project Creator 1.40. But there are only 3 examples of this Kit.
Similar board CY8CKIT-064B0S2-4343W has many examples which I can use. Is there a way I can use those examples on the board which I am using?
Dear Sirs and Madams,
Please tell us about the BSDL file of PSoC6.
While researching this community, I found the following KBA:
I understand that PSoC4 does not support JTAG and therefore does not provide a BSDL file, and that PSoC3 / 5 are provided in the programmer's file path.
I referred to the link of PSoC6 in the KBA, however it looks like the BSDL file for PSoC6 is missing.
Is it correct to understand that BSDL files for PSoC 6 is not provided?
Hello, I am currently having trouble trying to complete one of the first tasks for the hello world exercise. Mainly because am using a Macbook and am unfamiliar with how the terminal works here. After opening up the Terminal on MacOS, I am trying to select the KitProg3 COM port and then set the serial port parameters to 8N1 and 115200 baud.Show Less
I just updated to the latest libraries, and ModusToolbox 2.4, and ran into problems. I tracked them down to the fact that compile_commands.json no longer includes "-DCOMPONENT_CAT1" as part of the compiler command line. It used to define both COMPONENT_CAT1 and COMPONENT_CAT1A, but now only defines COMPONENT_CAT1A.
This breaks, among other things, _cyhal_utils_get_clock_count(), which now returns a value of 1 for all clock types.
I've worked around the problem by adding "CAT1" to the definition of COMPONENTS in my Makefile, but clearly that's not how it's supposed to work.
What happened? Did I do something wrong, or fail to follow some update procedure, or is this an oversight by Cypress developers?
I am using CY8CKIT-062S2-43012 and add a falling edge interrupt on P6_5 (with is MCU_TDI) and facing some problem .
The debug mode is set to SWD in "device configurator"->"system"->"debug", so i think we can usd that pin as normal gpio.
But if i use HAL 2.x, interrupt tigger will fail and i can only used HAL 1.6 to let it work.
If i didn't inital that pin in my code as a gpio, it will be high not low(other pin will be low).
What is the process to target a PSoC 63 in a 104-CSP pinout/package using ModusToolbox?
When attempting to open a New Application in ModusToolbox, I don’t see anything with a 104-CSP package under PSoC 6 BSPs. I’m targeting a CY8C6347FMI-BxDx3 part. Does ModusToolbox support a 104-CSP package?
I had to enable the continuous scanning myself in HAL library to get the ADC running continuously.
I have modified the library mtb_shared\mtb-hal-cat1\latest-v1.X\COMPONENT_CM4\source\cyhal_adc.c
in function cy_rslt_t cyhal_adc_configure(cyhal_adc_t *obj, const cyhal_adc_config_t *config)
obj->continuous_scanning = true;
obj->conversion_complete = false;
Before it was like shown below:
obj->conversion_complete = false;
In my CY8CKIT-062S2-43012 board I looking for expanding RAM for operations of mallocs functions.
I have come across one example (QSPI_F-RAM_Access) where QSPI is used for reading and writing in F-RAM. I am not if this is the best example for expanding the RAM for the above purpose. Is that correct understanding?
I thought F-RAM has support for memory-mapped access of RAM but I can not find any example for that. Please share the link for such an example on any PSoC board.Show Less