PSoC™ 6 Forum Discussions
Hi.
I'm trying to use the HAL System Power Management library to put the CM4 to sleep. So far, I've had no luck, and as I have found too many times, there is very little documentation available, and no examples. What documentation exists (e.g. Architecture TRM) is unclear, even suggesting that only masked interrupts can wake up a sleeping CPU.
Here's the environment:
- PSoC 63 with BLE in a custom board.
- MTB 2.3.0
- BSP 2.3.0
- PDL 2.3.0
- HAL 2.1.0
- CM4 and CM0+ running FreeRTOS
- Several peripherals in use (BLE, I2C, UART, SPI, RTC, TWPCM, etc.)
- I registered four callbacks using cyhal_syspm_register_callback().
- I call cyhal_syspm_sleep().
- The four callbacks are called with state set to CYHAL_SYSPM_CB_CPU_SLEEP and mode set to CYHAL_SYSPM_CHECK_READY. All callbacks return true.
- The four callbacks are called again with state set to CYHAL_SYSPM_CB_CPU_SLEEP, but this time mode set to CYHAL_SYSPM_BEFORE_TRANSITION.
- The four callbacks are immediately called a third time with state set to CYHAL_SYSPM_CB_CPU_SLEEP, but this time mode set to CYHAL_SYSPM_AFTER_TRANSITION.
The first problem is that the CPU either doesn't sleep, or wakes up immediately. I disable the RTOS SysTick interrupt in one of the callbacks. I also disable several other peripheral interrupts, and turn off the BLE stack, none of which has made a difference. It's likely that some interrupt is firing, but I can't think of a good way to determine which is the culprit.
The second problem is that the stated behavior, namely that the callbacks are called on wakeup (CYHAL_SYSPM_AFTER_TRANSITION) in the reverse of the order in which they are called on sleep (CYHAL_SYSPM_CB_CPU_SLEEP) does not match the observed behavior.
Callbacks are always called in the same order, even when one of the callbacks returns false in response to CYHAL_SYSPM_CHECK_READY.
Has anyone successfully used cyhal_syspm_sleep() to put one of the CPUs to sleep?
Thanks,
-Nick
Show LessHello,
I am using modustoolbox 2.4 with 256k flash PSoC6 controller which has CM0+ and CM4 cores. I want that cores should be deepsleep mode. I am calling
"Cy_SysPm_CpuEnterDeepSleep(CY_SYSPM_WAIT_FOR_INTERRUPT); " from CM4 core. Would CM0+ core also enters into deepsleep? I am expecting current consumption in range of 10uA, but I am measuring around ~2mA. Could you suggest?
How can can I check that CM0+ is in deepsleep or not? I also checked Switching_Power_Modes example code. I am not able to locate the main function of CM0+ core. There is only startup function as below:
Where is main function of CM0+ in Modustoolbox example code.
Show LessHello,
Is there an example of an application that allows TLS authentication (just authentication, without any further information exchange) via UART, USB CDC-ACM or USB CDC-NCM connection using Mbed-TLS with hardware acceleration?
Is there any set of examples from which I would be able to put together such an application?
Thanks in advance
Show LessIn my CY8CKIT-062S2-43012 board I looking for expanding RAM for operations of mallocs functions.
I have come across one example (QSPI_F-RAM_Access) where QSPI is used for reading and writing in F-RAM. I am not if this is the best example for expanding the RAM for the above purpose. Is that correct understanding?
I thought F-RAM has support for memory-mapped access of RAM but I can not find any example for that. Please share the link for such an example on any PSoC board.
Show LessHello everyone,
I made a testing firmware that blinks an LED, which runs fine on my development board CY8CKIT-062S2-43012 but not on my custom board, which seems not to run the firmware at all. The MCU revision is slightly different (read by the programmer).
Development board:
Detected device PN: CY8C624ABZI-S2D44 SiliconID: E453 Revision: 12 FamilyID: 102 DIE: PSoC6A2M (read by the programmer)
CY8C624ABZI-S2D44ES2 (written on chip)
Custom board:
Detected device PN: CY8C624ABZI-D44 SiliconID: E402 Revision: 11 FamilyID: 102 DIE: PSoC6A2M (read by the programmer)
CY8C624ABZI-S2D44A0 (written on chip)
I see that the chip revision is different (Rev 12 on dev board and rev 11 on my board). Are there any firmware considerations I need to take into account between these 2 revisions or should the same firmware just work on both of them?
Are there any hardware considerations I need to take into account between these 2 revisions?
UPDATE: dev board has WCO but our board doesn't. What changes do I need to make to disable the WCO? I found #define CY_CFG_SYSCLK_WCO_ENABLED 1 in cycfg_system.c but commenting it out breaks the firmware on the dev kit as well.
Many thanks,
Remus.
Hello,
when I add svd file to see the peripheral register,every port (port0 to port14) has the same address.
※modus version is 2.2
But in another version(2.3),GPIO shows a correct address .
Was it a bug in version 2.2 Or I did a wrong config?.
Show LessHello, I am a novice, just contacted Modus ToolBox software, using the kit is CY8CKIT-062S2-43012; now I want to create a new project to practice, but this page appears, I do not know what to do next; sample program "Hello World" I also did not find, thank you for your answer
Show Less
Hi All,
Can someone give me an estimate of the power consumption of the chipset in the following modes.
1. Deep Sleep
2. ADC Data Input
3. Data Processing
4. Transmission
Thank you in advance.
Show LessWhat are the minimum requirements that an MCU must have to support the SDIO interface of a hosted WiFi/BLE module?
For example, how can I tell if a CY8C6247BZI-D44T can be paired with a CYW43012 based Murata 1LV or a CYW4343 based Laird 450-0159 or 450-0152?
Greg
Show LessDears,
I am unable to find "Tool Settings" under C/C++ Build as shown in some tutorials, manuals for Modus Toolbox IDE. Where are these settings in Modus Toolbox IDE - 2.4.0 version ? In previous release it was under Project Properties: C/C++ Build -> Settings as shown on this picture:
And for comparison - In 2.4.0 release the "Tool Settings" tab is missing:
Thanks in advance and Best Regards
Radim
Show Less