PSoC™ 6 Forum Discussions

[Az-eddine]

Hi,

I'm using a dual core psoc63 and BLE is on core M0p and this core stores BLE bonding list in "cy_em_eeprom" (0x14000000 size 0x8000).

My question is this region is accessible also from CM4?

In the first production of our board, due an error of generating hex file this region is empty and we want to fix it on the field over the air from application on CM4.

Thanks

[Yugandhar]

Hello,

Please refer to the below KBA for more information.
KBA Link: https://community.infineon.com/t5/Knowledge-Base-Articles/Manage-Working-Flash-Space-for-Both-Cores-...

Thanks,
P Yugandhar.

[Az-eddine]

Hi,

I read it, but the situation is as follow:

- BLE is on core M0+ and this region is fully assigned to this core in scat file.

- My colleague generated the output binary without defining this region in scat file.

- Many boards were sent to our coustomers with wflash empty and BLE will not work properly.

We want to fix the issue for those boards in the field using the application on CM4 is that possible?

Should we define this region (WFlash 0x14000000 size 0x8000) also for CM4?

what will happen if we try to fix this region writing the correct values directly?

Thanks

[Yugandhar]

Hello @Az-eddine ,

You can define WFLASH eeprom region in M4 application and update it on filed. Please try at your end and let me know the results. 

Thanks,

P Yugandhar. 

[Az-eddine]

Hi Yugandhar,

but if i define this region, flashing it on CM4 the data flashed by CM0p will be erased!

I will proceede by fixing it on CM0p. Anyway is very interesting to know if is there a way to write it from CM4 without conflicts!

thank

Thanks