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Hi,
I am working on PSOC6 CY8C MCU in one of our projects and we want to secure the debug port in NAR.
I am able to lock the debug port (CM0+ and CM4) by configuring sFlash NAR area(0x16001A00), we used Cy_Flash_WriteRow() system call to write into sFlash NAR area.
Now I have some queries which are mentioned below:
1. How to unlock the debug port (CM0+ and CM4) in NAR so that I can re-program new firmware?
2. If it's not possible to unlock the debug port via firmware, is there any other way to do it?
Thank you.
Solved! Go to Solution.
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PSoC 6 MCU
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Hi @AyushK ,
The thread was locked due to inactivity for a long time, you can continue the discussion on the topic by opening a new thread with reference to the locked one. The continuous discussion in an inactive thread may mostly be unattended by community users.
Thanks and Regards,
Gautami J
Cypress Semiconductor Corporation
An Infineon Technologies Company
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Hi @AyushK ,
Can you please let us know which board (MPN) you are using and which application you are using to run this project?
Warm Regards,
Gautami J
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Hi @AyushK ,
The thread was locked due to inactivity for a long time, you can continue the discussion on the topic by opening a new thread with reference to the locked one. The continuous discussion in an inactive thread may mostly be unattended by community users.
Thanks and Regards,
Gautami J
Cypress Semiconductor Corporation
An Infineon Technologies Company