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PSoC™ 6

SaGa_4641021
New Contributor II

Hi

I need to implement an additional I2S port on the PSoC-6, my PSoC has only a single I2S module.

I found few resources for UDB I2S, and I have a few questions:

What I am trying to do:

1- I need left and right interleaved (24-bits data, 64-bits word length) --> This makes up 8-bytes (UDB FIFO is only 4-bytes).

2- I need to stream 160-bytes at at time.

3- I can use DMA.

4- UDB FIFO is 4-bytes, interleaved between left and right.

5- UDB FIFO interrupts is for non-empty or overflow.

Confusion:

Given those conditions (interrupt, buffer size, data format):

1- How can I capture the 160-bytes, which interrupt to use ?

2- And, how can I figure out which byte is received (is it left or right and which byte within the 4-bytes it is). 

thanks

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1 Solution
RodolfoGL
Employee

The "source increment" of the DMA should be set to ZERO, since you read from a FIFO, so the address is always the same.

What exactly you are trying to do with the I2S? Just to interface a speaker (only TX required)? Or a headphone (RX and TX)? Or a microphone (only RX required)?

View solution in original post

8 Replies
RodolfoGL
Employee

You can configure the UDB datapath to be 32-bit wide, so you can have 4-words deep FIFO.

So basically what you need is to setup a DMA to trigger when there is at least one WORD in the RX FIFO. Or when the TX FIFO is not full. Configure the DMA to generate an interrupt after transferring 160/4 = 40 WORDs. 

Note the I2S_WS line tells which sample is being driven - LEFT or RIGHT. So make sure to have some kind of sync logic before feeding the first WORD to the RX FIFO. Or writing the first WORD to the TX FIFO.

There are some nuances to implement TX and RX to run at the same time. But if you need only one direction, it should be straight forward.

We do have an implementation of the I2S Master for PSoC 4. You can leverage that code if you need the Master only.

https://www.cypress.com/documentation/component-datasheets/inter-ic-sound-bus-i2s

 

RodolfoGL
Employee

One more thing. You might also be interested in this code example:

https://github.com/Infineon/mtb-example-psoc6-smartio-i2s

It implements an I2S Master (TX only) using SPI + Smart I/O. That runs out of the box for PSoC 6.

SaGa_4641021
New Contributor II

unfortunately, this is modus example, we have to use psoc creator in our team

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SaGa_4641021
New Contributor II

Hi

It is taking me a while to successfully create the code as per your advice, so I am trying to make a simpler code to grasp how to manage the DMA for UART.

I am writing a code to capture 5 inputs from the UART by DMA and write these values to a 10-byte array. After the 5 bytes are read, i want to write them to the UART using uart_putarray().

I configured the RX FIFO Level in the UART to 4, and  the X-loop to 5 as shown in the figures. I use DMA ISR to write to the UART, so the DMA ISR should engage after receiving the 5 bytes. 

Result: DMA responds after sending 6 bytes not 5, then afterwards, the DMA ISR is called after every single byte.

i attached the project, i wonder if you can help me figure out how to set the parameters, i will use this as a reference project ?

 

SaGa_4641021_0-1637902686257.png

 

 

 

thanks

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RodolfoGL
Employee

The "source increment" of the DMA should be set to ZERO, since you read from a FIFO, so the address is always the same.

What exactly you are trying to do with the I2S? Just to interface a speaker (only TX required)? Or a headphone (RX and TX)? Or a microphone (only RX required)?

View solution in original post

SaGa_4641021
New Contributor II

with the I2S, I am streaming data from 3 mics (stereo on I2S and single channel on UDB-I2S), then I combine their packets with single IMU and stream them to SDCARD. I can't used the regular TDM mic connection due to chip shortage of daisy chain mics

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RodolfoGL
Employee

OK. So the Smart I/O + SPI Solution does not work out-of-box, since it only supports TX. However, it could be modified to support RX.

In any case, let me know if you are able to make this work with the UDBs. I think the easiest path would be to port the I2S Component to PSoC 6. It has a mode to support RX only.

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SaGa_4641021
New Contributor II

Hi Rodolf, i already am using the I2S (PDL 2.0) and I need an additional I2S, so i am using the UDB (PDL 2.7). After debugging, I found that the I2S_UDB can only send or receive 1-byte of data, i failed to make it send or receive 4-bytes. the details are in a new thread that i started :

https://community.infineon.com/t5/PSoC-6/I2S-UDB-data-size-issue/m-p/325952#M11229

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