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PSoC™ 6 Forum Discussions

efor
Level 2
Level 2
10 sign-ins 5 replies posted 5 sign-ins

Hello All,

I am reaching out as I have been having some trouble while using the UDB document tool in the component creator. I am trying to get the count7 to output the terminal count to an external pin. However, I can only get one pule on a reset of the device (This means I probably have the connection to the pin correct). I have also tried to include a button input to Reset of the counter and have seen no change.

Cypress's has an example on youtube called "How to Create a Traffic Light Controller using UDBs with PSoC 5LP (Part 1)" but they don't go into detail of how to setup the count 7 component. But I followed what I saw the guy do in the UDB document.

I am looking for some direction on how to use the tool or any good documentation on the use of this tool. Or if this development tool meant to work the the PSoC 6s at all? 

I have also attached a copy of the test component that I have created when using the CYBLE-416045-02 if anyone can try to replicate this issue.

Thanks!

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1 Solution
efor
Level 2
Level 2
10 sign-ins 5 replies posted 5 sign-ins

Hello again,

So The solution to this problem was that I never started the count7 component. I guess I should have realized this after using the normal UDB count7s for my projects but, did not. I think that this should be mentioned somewhere in the components authors guide for someone who is just starting with this tool to avoid them some pain. 

Thanks for all your help

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7 Replies
Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

efor,

I don't have a direct answer for the issue you are seeing.   I've created components before but never used a .cyudb configuration.   Where did you find info about this feature?

However, I'm wondering why you were not using the Count7 component available for the PSoC6.

Len_CONSULTRON_0-1620912969765.png

 

Len
"Engineering is an Art. The Art of Compromise."
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Hello Len,

I have been referencing the "Universal Digital Block (UDB) Editor Guide" for this project but I can't find a clear description of the count7 tool. 

The main reason why I am using this tool is to utilize the Datapaths in the UDB in conjunction with the count7. I wanted to count at the same time as a shift instruction but didn't want to use 2 Datapaths to do it. 

Thanks!

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RodolfoGL
Employee
Employee
250 sign-ins 5 comments on KBA First comment on KBA

If you are familiar with Verilog, it will have much more flexibility on what you can do with the UDBs. All the information you need is in section "4.3.4.5 Count7".

You can use the output ".count()".

Simply create a wire like this:

wire [6:0] count_output;

Or you can simply use the component that comes with PSoC 6. If you need any customization, you can start from there by importing the component and doing changes in the Verilog.

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efor
Level 2
Level 2
10 sign-ins 5 replies posted 5 sign-ins

So the deeper question is: Is this UDB editor just a broken tool? It seems like everywhere on the forums people just resort to the Verilog after some frustration with using it.

I have been looking at it and the Verilog generated from this tool makes the state machine count7 and data path Verilog more clear for a beginner like me.  I do intend to move to it in order to use the data path functionality. 

I guess I wanted to point out/find out why this PSoC creator tool isn't working because I wanted to get a working example as similar to the final product with the tool before I modified the Verilog for myself.

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RodolfoGL
Employee
Employee
250 sign-ins 5 comments on KBA First comment on KBA

The UDB editor is not broken. It just doesn't provide as flexibility as the Verilog implementation.

Developers with no experience with Verilog (or doesn't want to touch it) shall use the UDB editor.

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efor
Level 2
Level 2
10 sign-ins 5 replies posted 5 sign-ins

Hello again,

So The solution to this problem was that I never started the count7 component. I guess I should have realized this after using the normal UDB count7s for my projects but, did not. I think that this should be mentioned somewhere in the components authors guide for someone who is just starting with this tool to avoid them some pain. 

Thanks for all your help

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efor,

I'm glad you found the solution.

It's a bit confusing.   Some components need to be started and some components do not (Eg. logic elements such as OR, AND, NOT gates or latches.)

 

Len
"Engineering is an Art. The Art of Compromise."
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