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I have previously a project that uses a PIC18 micro-controller as a SPI slave to receive SPI data from another PIC micro-controller at a clock rate of 2Mbps
I have replaced the PIC18 with CYBLE416045-02 as the SPI slave operating in mode 0,0.
However, the received data seems to have issue.
I have tested with using a fixed data 'AA'h and the following is what was received. The bold highlight indicates the error byte.
I have also tried reducing the clock speed to 1Mbps but to no avail.
The attached contains the project file which I hope someone can advice how I can resolve the problem I have.
Thank you in advance.
cRxBuffer [64] 0x08027C70 (All) uint8 [64]
0 0xAA '\252' 0x08027C70 (All) unsigned char
1 0xAA '\252' 0x08027C71 (All) unsigned char
2 0xAA '\252' 0x08027C72 (All) unsigned char
3 0x4A 'J' 0x08027C73 (All) unsigned char
4 0xAA '\252' 0x08027C74 (All) unsigned char
5 0xAA '\252' 0x08027C75 (All) unsigned char
6 0xAA '\252' 0x08027C76 (All) unsigned char
7 0xAA '\252' 0x08027C77 (All) unsigned char
8 0xAA '\252' 0x08027C78 (All) unsigned char
9 0xB6 '\266' 0x08027C79 (All) unsigned char
10 0xAA '\252' 0x08027C7A (All) unsigned char
11 0xAA '\252' 0x08027C7B (All) unsigned char
12 0xAA '\252' 0x08027C7C (All) unsigned char
13 0xAA '\252' 0x08027C7D (All) unsigned char
14 0xAA '\252' 0x08027C7E (All) unsigned char
15 0xAA '\252' 0x08027C7F (All) unsigned char
16 0xAA '\252' 0x08027C80 (All) unsigned char
17 0xAA '\252' 0x08027C81 (All) unsigned char
18 0xAA '\252' 0x08027C82 (All) unsigned char
19 0xAA '\252' 0x08027C83 (All) unsigned char
20 0xAA '\252' 0x08027C84 (All) unsigned char
21 0xAA '\252' 0x08027C85 (All) unsigned char
22 0xAA '\252' 0x08027C86 (All) unsigned char
23 0xAA '\252' 0x08027C87 (All) unsigned char
24 0xAA '\252' 0x08027C88 (All) unsigned char
25 0xAA '\252' 0x08027C89 (All) unsigned char
26 0xAA '\252' 0x08027C8A (All) unsigned char
27 0xAB '\253' 0x08027C8B (All) unsigned char
28 0xAA '\252' 0x08027C8C (All) unsigned char
29 0xB4 '\264' 0x08027C8D (All) unsigned char
30 0xAA '\252' 0x08027C8E (All) unsigned char
31 0xAA '\252' 0x08027C8F (All) unsigned char
Solved! Go to Solution.
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- spi slave issue
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Good day,
I would like to inquire on the MOSI line for the SCB functioning as a SPI slave.
I am using the Motorola mode 0,0.
The SPI master will clock out on the clock rising edge the serial data on the MOSI line.
Can I confirm if the SPI slave will sample the MOSI on the falling edge of the clock as there is no function to define this for this SCB?
If the MOSI line is sampled on the falling edge of the clock, the data on the MOSI is already in a stable state and there should not be any error as what I have observed.
There are mention of clock oversampling for the SPI device.
Can anyone advice in detail how this affects the data sampling the SPI slave SCB?
Thank you.
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Hi TaCh_734676,
I tried to run your project with one of our kits that has PSoC 63 BLE device in it. I was not able to reproduce your issue. Please see the attached screenshot:
Please probe the communication lines using an analyzer and check if the PSoC is reading what is being sent in the bus or is there any issues with the sampling of the data by the PSoC device.
Note the actual data rate being displayed in the configuration window and set the communication data rate accordingly.
Regards,
Bragadeesh
Bragadeesh
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Dear Bragadeesh,
Thank you for trying out and confirming there is no issue with the code for the SPI slave.
I did not monitor the line with an analyser as I have another SPI flash memory sharing the same lines but with a different chip select.
I have no issue writing and reading from the SPI flash and hence I did not suspect an issue with the lines.
May I ask if there is anything (e.g impedance) that one will need to note for the Cypress SPI interface?
Thank you once again.
Best Regards,
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Hi TaCh_734676,
We asked you to probe the SPI lines so that we can know if the PSoC device is sampling the data correctly from the bus.
You can refer to the section Actual Data Rate Calculations in the SCB component datasheet for more information on the data rate SPI interface (Doc : 002-19376 Rev. *B) Pg 14.
Regards,
Bragadeesh
Bragadeesh
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Good day Bragadeesh,
The below pictures show the clock and data respectively.
One can observe the data on the SPI line is stable with the value of 0xAA and the clock rate is 1MHz.
However, the data that is captured by the PSoc device contains data other than 0xAA.
What is the possible cause for the results obtained?
I wonder if you can pass me the project that you have used for your testing.
Thank you & Best Regards,
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Good day,
I would like to inquire on the MOSI line for the SCB functioning as a SPI slave.
I am using the Motorola mode 0,0.
The SPI master will clock out on the clock rising edge the serial data on the MOSI line.
Can I confirm if the SPI slave will sample the MOSI on the falling edge of the clock as there is no function to define this for this SCB?
If the MOSI line is sampled on the falling edge of the clock, the data on the MOSI is already in a stable state and there should not be any error as what I have observed.
There are mention of clock oversampling for the SPI device.
Can anyone advice in detail how this affects the data sampling the SPI slave SCB?
Thank you.
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Good day,
I just realized that for my mode of operation, I should not be using Motorola mode 0,0 for the SPI slave.
After changing the mode to 1,0 , the data error issue is resolved and the data rate is also increased to 3.125Mbps.
Somehow, this is the maximum clock rate that can be achieved with this SCB.
Can I confirm if this is true?
Thank you.
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Hi TaCh_734676,
When SCB is used as SPI slave mode, the max data rate at which the slave can operate depends on the frequency of the connected clock source to the SCB block.
The actual data rate that is displayed in the component is based on the assumption on specific external master configuration and parameters. Hence this may or may not be the actual data rate. As suggested earlier, refer to the section Actual Data Rate Calculations in the SCB component datasheet.
Oversampling factor is only applicable for SPI master modes and not for slave modes.
Regards,
Bragadeesh
Bragadeesh