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I am facing a strange issue with accessing external Serial NAND flash memory using SMIF peripheral in PSoC6 at 50MHz.

CPU is CM0p at 100MHz, CM4 @100MHz is idle.

SMIF is HFCLK / 2 = 50MHz


Memory: Winbond W25N01GV (1Gbit) and W25M02GV (2Gbit)

Following is the problem.

1. Quad/SPI mode reads are working fine without any delays or waiting for chip status and availability.

2. SPI Mode Block Erase instructions working absolutely fine.

3. Reading and Writing to Status registers in SPI mode working fine.

4. When I try to program multiple pages starting from the Block start boundary, some pages get written and some not.

5. When Write page fails, it was seen that the Flash chip did not respond to Read JEDEC ID commands in SPI mode. It returned all Zeros.

6. It was also seen that when the chip responds to Read JEDEC ID command in the first attempt before writing a page, then only the page write succeeds.

7. The Page Writes fails only if the Read JEDEC ID command fails to get the chip signature in the first attempt.

8. The strange thing is I intentionally tried to read JEDEC ID before each Status register read for Busy bit, Program and erase status bits, and Reading and writing a page, the chip wasn't available to communicate on the Quad or SPI bus until 250mSec. It was there sometimes in less than 1 mSec but not always.

9. Another confusing thing is, the Writes are working fine when all commands and data is transferred in SPI mode for Write and Quad mode for Reads.

Any help on the above issues would be highly appreciated.

2 Replies
First comment on KBA First comment on blog 5 questions asked

Can you please share your ".cymem" file you created for the memory chip you are using? Please share the entire project if possible so that I can have a look at various things.




As this is a commercial project, I won't be able to share the project. However, I used the SMIF example for FRAM in the PSoC Creator v4.2 and extended it to modify the HFCLK2 to 50MHz in the Clock configurations.

I haven't created a separate .cymem file because the Winbond chip was difficult to map in the GUI tool to create the .cymem file and created code which was not easy to migrate to Winbond chip.

Hence, I used the already existing .cymem file from PSoC6 example project and simply extended the available commands to match the communication sequence of the Winbond chip.

I am currently trying to probe the signals on the logic analyzer and DSO and see if there are any signal integrity or power supply issues.

The strange part is, SPI mode works flawlessly with a decent memory transfer speeds whereas Quad mode fails only when a Write is initiated. I have verified the Write protection and Quad transfers are enabled in the memory.

If I run the same project on CY8C6347BZI-BLD53 CPU, it works while it fails on CY8C6347BZI-BLD33 CPU.