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PSoC™ 6 Forum Discussions

AyushK
Level 1
Level 1
First reply posted First question asked Welcome!
 

Hi,

I am working on PSOC6 CY8C MCU in one of our projects and we want to secure the debug port in NAR.

I am able to lock the debug port (CM0+ and CM4) by configuring sFlash NAR area(0x16001A00), we used  Cy_Flash_WriteRow() system call to write into sFlash NAR area.

Now I have some queries which are mentioned below:

1. How to unlock the debug port (CM0+ and CM4) in NAR so that I can re-program new firmware?

2. If it's not possible to unlock the debug port via firmware, is there any other way to do it?

Below are some details:

MCU :  CY8C6248BZI-S2D44

MPN : 

PCBA = 47616062

PCB = 47616063

Application:

We have some project specific application where we need to make sure debug is locked and can be UNLOCKED again.

Debug Port locking has been successfully evaluated and we are now exploring on unlocking the secure debug port so that our boards should be reused for any further updates.

Please help us in providing information on UNLOCKING secure debug port. 

 

Thank you.

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1 Solution
Pushyanth
Moderator
Moderator
Moderator
50 sign-ins 5 solutions authored 10 replies posted

Hi @AyushK ,

 

It is not possible to clear the NAR bits present in the SFLASH using the system calls. There is a code example which demonstrates a work around for clearing the NAR bits. This is not publicly available, you need to sign an NDA in order to get access to the code example. If you are interested, please contact the Sales team for the procedure for signing NDA and get access to the code example. Please visit https://www.infineon.com/cms/en/about-infineon/company/contacts/  for contact details.

 

Thanks and Regards,

Pushyanth

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4 Replies
Pushyanth
Moderator
Moderator
Moderator
50 sign-ins 5 solutions authored 10 replies posted

Hi @AyushK ,

The system call infrastructure is built in such a way that it will only allow the more restrictive changes for Normal Access Restrictions. You can use a bootloader to update the code instead of enabling the debug ports. Refer to mtb-example-psoc6-mcuboot-basic on how to implement a bootloader for updating applications.

 

Thanks and Regards,

Pushyanth

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AyushK
Level 1
Level 1
First reply posted First question asked Welcome!

Hi @Pushyanth,

We don't want to flash the firmware via Bootloader.

We want to access the debug port and want to flash the firmware via Jlink/Jtag once its locked.

Please note, 

  • To disable/lock the debug port for both core CM0 and CM4, we have set the 0th(CM0+) and 1st(CM4) bit of ACCESS_RESTRICT0(0x16001A00).
  • To write into sFlash NAR area we used Cy_Flash_WriteRow(uint32_t rowAddr, const uint32_t* data) system call.

Please provide solution for this.

Thank you. 

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Pushyanth
Moderator
Moderator
Moderator
50 sign-ins 5 solutions authored 10 replies posted

Hi @AyushK ,

 

It is not possible to clear the NAR bits present in the SFLASH using the system calls. There is a code example which demonstrates a work around for clearing the NAR bits. This is not publicly available, you need to sign an NDA in order to get access to the code example. If you are interested, please contact the Sales team for the procedure for signing NDA and get access to the code example. Please visit https://www.infineon.com/cms/en/about-infineon/company/contacts/  for contact details.

 

Thanks and Regards,

Pushyanth

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Pushyanth
Moderator
Moderator
Moderator
50 sign-ins 5 solutions authored 10 replies posted

Hi @AyushK ,

 

Please let us know if your query was resolved.

We will lock the thread in 3 days.

If your problem is not resolved, please create a new thread and we will be happy to help. 

 

Regards,

Pushyanth

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