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Hi
I am using CYB0644ABZI-S2D44 can you verify it and send me the confirmation.
As its in Prior.
Regards
Nirmith
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Hi:
I have reviewed your doc and found something I need to confirm with you:
1. P2.0-P2-7 The pin mark is WIFI, do you mean using the SDHC to control wifi module?
2. P0.1 Are you sure this pin function as JTAG_TRST? The pin assignment map seems like not including that fucntion.
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Hi
As we are using WFM200S022XNA3 as wifi module. Yes we are using SDHC lines to control Wi-Fi module .
Regarding the P0.1 it was suggested in the PSoC 6 hardware design consideration.
Please go through it and verify it the given part no for Wi-Fi module.
Regards
Nirmith
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Hi:
I have confirmed that P0.1 can be used as JTAG_TREST. By the way, if you use that pin, then you can NOT use WCO to connect external clock. Please make sure you will not use that function.
zhichao
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Hi
As we are giving two external clocks as inputs so can you verify it once again.
Regards
Nirmith
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Hi:
So that means you will use 32.768KHz as a RTC? If you use that watch crystal oscillator, then you can not use JTAG_TRST.
zhichao
zhichao
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Hi
Yes we are using 32.768KHz but we are just giving it to P0.0 and the other output we are giving it to the wifi module so as you have said we are not connecting 32.768KHz to P0.1.
Regards
Nirmith
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Hi
We are not using crystal oscillator we are using Standard Oscillator.
Regards
Nirmith
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Hi:
If you really use two external clocks, then you must connect to PSOC6, right? So P0.1 will be function as WCO. Otherwise , how to input two external clocks? You can use SWD program interface to replace JTAG to program your MCU.
zhichao
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Hi
The current schematic is as below:
As we are using oscillator module which has only one output to be connected to the controller, P0.1 becomes free. As per my understanding we need the secondary clock input to the Psoc6 and it can be given by any clock source, if we use only crystal as a clock source we need to utilize two pins P0.0 and P0.1 but if oscillator is used i just need the P0.0.
Kindly let me know even in this condition i can't use P0.1 JTAG reset functionality then i would move to SWD.
Regards,
Nirmith