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PSoC™ 6

SuRa_2245351
Level 4
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I have written code for UART and printing using both core CM0+ and CM4, its printing properly but I had doubt. Since both cores are transmitting using same UART block will there be any clash.

Example: if suppose CM4 is transmitting and CM0+ also want to transmit at same time will there be any clash, and if there is clash how priority is resolved between CM0+ and CM4 or else I have to use IPC to check whether UART is free and done with transmission.

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AlanH_86
Employee
100 replies posted 50 replies posted 25 solutions authored
Employee

Yes there is a clash

The contention is resolved as a race condition... whoever writes first wins

The priority is resolved first come first serve.

The only correct thing to do is to use a semaphore... implemented via IPC.

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AlanH_86
Employee
100 replies posted 50 replies posted 25 solutions authored
Employee

Yes there is a clash

The contention is resolved as a race condition... whoever writes first wins

The priority is resolved first come first serve.

The only correct thing to do is to use a semaphore... implemented via IPC.

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SuRa_2245351
Level 4
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Thank you for reply arh, I will try using semaphore.

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MarkA_91
Employee
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Employee

Please see application note AN215656 and code example CE216795. Both show how to set up an IPC-based semaphore for the two CPUs in PSoC 6 to share a resource. In the project the resource is just a byte in RAM, but the concept can be easily extended for other resources such as a UART.

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