Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

PSoC™ 6 Forum Discussions

vinu_gk
Level 3
Level 3
50 sign-ins First solution authored 10 replies posted

Hi,

We are seeing a positive pulse in pin 6.5 while powering up, resetting & programming (via SWD). Please see the attached screenshots. 

The pin is port 6, which also has SWD and reset lines. We tested the pin with various configurations via PSoC creator, but couldn't find out the root cause. Can anyone help us in debugging this issue ?

Edit: We are also seeing a similar issue in pin 11.1

regards,

Vinu

@shibin 

0 Likes
1 Solution
Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

vinu,

By default, all GPIO pins start out at reset as Analog_HiZ.   This means the pin though configured at initialization as a pull-down output inactive low starts life floating until the boot initialization is complete.

If this is your design case, then I recommend a medium value resistor (100K?) pull-down to GND.

Len
"Engineering is an Art. The Art of Compromise."

View solution in original post

12 Replies
LeoMathews
Moderator
Moderator
Moderator
100 sign-ins 25 solutions authored 100 replies posted

Hi @vinu_gk 

Can you please specify whether you are using a development kit or a custom board? Also, can you update which PSoC6 device you are using? What was the pin assignment in your project?

Thanks and Regards,
Leo

0 Likes

Hi @LeoMathews ,

We are using custom board running on CY8C6247FDI-D32T. Please see the screenshot attached for buzzer pin (P6.5) configuration.

regards,

Vinu

0 Likes
Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

vinu,

By default, all GPIO pins start out at reset as Analog_HiZ.   This means the pin though configured at initialization as a pull-down output inactive low starts life floating until the boot initialization is complete.

If this is your design case, then I recommend a medium value resistor (100K?) pull-down to GND.

Len
"Engineering is an Art. The Art of Compromise."

Hi @Len_CONSULTRON ,

The issue seems to be resolved now. We changed the pull down res value from 4.7K to 1K.

Note: Giving a weak pull-up of 100K didn't work though.

 

Thanks & best regards,

Vinu

0 Likes

Hi @Len_CONSULTRON ,

We would like to know in detail what causes the pin to go high during flashing/resetting. 

Is it possible to find what the cause of this unexpected behavior is? Since this device will be used in medical settings, it is important that we know exactly why things are acting peculiar.

 

regards,

Vinu

0 Likes

Vinu,

Infineon might be a better source of answering this last question however I will give it a try.

When the pin goes from output low to analog HiZ it doesn't "go" high it floats.  This means it can float in the high direction or float in the low direction due to some leakage current on the circuit.  Normally it just sits where it is left when it was an output until some small leakage current from another circuit element on the pin slowly floats it in the direction of the leakage.

However, many times the pin state may be dependent on the inputs (or other outputs) externally connected.  For example, I have worked with external ICs that have a pull-up resistor on an input internal to the IC.  This is to allow the input to be "enabled" with an active high signal with no circuit traces connected anywhere else on the board.   An common example of this is a voltage regulator with an ENABLE input.   The ENABLE input can be controlled by the CPU or left unconnected to be always enabled.

In a previous post you mentioned:

Note: Giving a weak pull-up of 100K didn't work though.

The fact that a 100K pull-down did not work for you means that something else on this pin's circuit is pulling it up.  Normally on a truly floating input, a 100K resistor pull-down should be sufficient.

You mentioned that a 4.7K resistor did not work but a 1K resistance as a pull-down worked.  This means that somewhere on that circuit the pull-up equivalent resistance is probably less than 5K which is significant.

Suggestion #1:

Can you share the datasheet of the device connected to the buzzer pin? We can take a look at it to give you a better idea of the float bias.

Suggestion #2:

Can isolate the buzzer enable pin used on the PSoC6 from the rest of the circuit?

If you can, you can measure where the pull-up bias is coming from.

Len
"Engineering is an Art. The Art of Compromise."

Thanks for the detailed explanation @Len_CONSULTRON .

Please see the  datasheet of the Buzzer controller IC - AP22815AWT attached. 

Also attached is a snapshot of our buzzer control circuit.

regards,

Vinu

0 Likes

Additional context:

"We were able to observe a High voltage Level even after removing FB16 and R146 (completely isolating the voltage to the AP22815AWT-7 / Buzzer), so we assume the PSoC must be giving a high signal at reset/powerup." - Ashin

BUZZ_PWR_EN is connected directly to the PSoC (CY8C6247FDI-D32T) pin P6.5 (N4), with nothing besides what is shown in the schematic.

So the AP22815AWT had its supply voltage completely removed while the BUZZ_PWR_EN signal was still pulled HIGH... presumably by the PSoC.

Bit-Twiddler,

 


"We were able to observe a High voltage Level even after removing FB16 and R146 (completely isolating the voltage to the AP22815AWT-7 / Buzzer), so we assume the PSoC must be giving a high signal at reset/powerup." - Ashin

Interesting.

Here is what the "002-18787_PSoC_6_MCU_PSoC_63_with_BLE_Datasheet_Programmable_System-on-Chip_PSoC.pdf" datasheet indicates on page19 about GPIO pins:

During power-on and reset, the pins are forced to the analog
input drive mode, with input and output buffers disabled, so as
not to crowbar any inputs and/or cause excess turn-on current.

This indicates at powerup/reset the pin is analog HiZ.  After reset initialization can set it to an output at any time.  Note:  The port pin data register should be set to 0 BEFORE setting the drive mode to output.   

Are you using PSoC Creator or ModusToolbox as your IDE for this project?

Len
"Engineering is an Art. The Art of Compromise."

Vinu, Ashin & I are using PSoC Creator for the project. As seen in the schematic Vinu posted we do have a 4.7kΩ pull-down (R147) on the signal from the PSoC at all times. And as Ashin pointed out we also removed 3.3V supply from U11 during testing. In spite of that the signal was still pulled high constantly when the PSoC is being programmed, and momentarily when the PSoC is reset.

The only possibilities I see thus far are:
1) The PSoC is pulling high during programming/reset states, even though the documentation says it isn't supposed to. Perhaps there's a particular exception to this either due to a special function of that pin, or silicon/design mistakes hopefully caught in and errata document somewhere.

2) There's a manufacturing/assembly/design issue that is pulling the circuitry high when it isn't supposed to. What's odd is that the boards we've tested thus far all have this issue. So if it's a manufacturing issue, it's certainly consistent.

Since we've ruled out the AP22815AWT, do you have any further suggestions on how to track down the source of this issue?

Also, how would you suggest we contact Infineon, or get there attention here, to work through this issue?

Bit_Twiddler.

I agree.  It appears that the PSoC6 is the cause of the active high issue at reset/programming.

Pin 6.5 does have an alternate use as cpuss.swj_swdoe_tdi.   I could not find info about how this might affect the pin during programming or reset.

Suggestion #1:

Try this different pin configuration:

Len_CONSULTRON_0-1672321700964.png

It shouldn't hurt since you already have an external pull-down of 4.7K  However, it probably won't help either since it appears the issue shows up before the pin configuration initialization.

Suggestion #2:

I noticed from the AP22815AWT datasheet that the AP22815BWT is an active "low" signal.  Using an active low version of this part, changing the 4.7K external resistor to a pull-up and inverting the logic in the PSoC6 may fix this problem.

 

I hope that someone from Infineon can response to this thread.  They have internal knowledge of the part and that specific pin that might shed some light as to what is happening.

I suggest you contact your local Infineon field representative to get tech support on this issue.

Len
"Engineering is an Art. The Art of Compromise."

vinu,

Thank you for sharing.

The AP22815AWT has the following note on page 13 of the datasheet you supplied:

ON/OFF Input Operator
The EN input allows the output current to be switched on and off using a GPIO compatible input. The high signal (switch on) must be at least 1.2V and the low signal (switch off) no higher than 0.4V. This pin should not be left floating. It is advisable to hold the EN signal low when applying or removing power.

They don't exactly say why they advise this.  It is assumed the input is floating based on the other info in the datasheet.

Len
"Engineering is an Art. The Art of Compromise."