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PSoC™ 6 Forum Discussions

lovelyboysaybye
Level 1
Level 1
First question asked Welcome!

Hi!

I found the Snippet code of async recording from the microphone CY8CKIT-062-WiFi-BT with CY8CKIT-028-TFT display here:
https://infineon.github.io/mtb-hal-cat1/html/group__group__hal__pdmpcm.html (Snippet 2: PDM/PCM Asynchronous Receive). My application record a 1-second audio frame and processes it by NN in parallel. I measured the power consumption of PSoC6 and aligned the measured results with the time, required for the calculation in my application (screenshot below) and found, that for almost 0.8 seconds wait for end of the new recording. 

photo_2022-12-01_20-46-55.jpg


The microphone is configurated to record data and write it by using DMA only. So, if I do not use the CM4 while async recordings, is it possible to set the CM4 in sleep mode and wake up it by the event of the ending of the recording (CYHAL_PDM_PCM_ASYNC_COMPLETE)?

I attached the main.c file and remove some processing parts. The idea is to set CM4 to sleep after processing at line 186 and wake it up by end of the recording event (CYHAL_PDM_PCM_ASYNC_COMPLETE).

If CM4 cannot be awakened by the CYHAL_PDM_PCM_ASYNC_COMPLETE event, maybe somebody can recommend other techniques for reducing power consumption while recording data?

 

Thanks,
Andrii

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1 Solution
RodolfoGL
Employee
Employee
250 sign-ins 5 comments on KBA First comment on KBA

Yes, you can place the CM4 in sleep mode (but not in deep-sleep).  In your for (;;) loop, you can add cyhal_syspm_sleep().

Note that the implementation of the DMA with the HAL PDM/PCM driver is not optimal. The DMA is triggered in software, so there is not much gain using DMA here. There is an interrupt occurring on the background to trigger the DMA every time the PDM/PCM FIFO is half full. 

You might need to use the DMA and PDM/PCM PDL drivers to have the optimal implementation. In this case, you can setup an interrupt to trigger when the DMA completes the transfer every 1 second.

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2 Replies
Len_CONSULTRON
Level 9
Level 9
500 solutions authored 1000 replies posted 750 replies posted

Andrii,

I could be wrong here (if so, I apologize) but I believe the PDM to PCM converter HW and DMA are not available in sleep mode.  This also includes other HW resources such as SPI for a SD drive.

Someone more familiar with the PSoC6 architecture should confirm or refute my statement.

Len
"Engineering is an Art. The Art of Compromise."
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RodolfoGL
Employee
Employee
250 sign-ins 5 comments on KBA First comment on KBA

Yes, you can place the CM4 in sleep mode (but not in deep-sleep).  In your for (;;) loop, you can add cyhal_syspm_sleep().

Note that the implementation of the DMA with the HAL PDM/PCM driver is not optimal. The DMA is triggered in software, so there is not much gain using DMA here. There is an interrupt occurring on the background to trigger the DMA every time the PDM/PCM FIFO is half full. 

You might need to use the DMA and PDM/PCM PDL drivers to have the optimal implementation. In this case, you can setup an interrupt to trigger when the DMA completes the transfer every 1 second.