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PSoC™ 6 Forum Discussions

AdKl_3857101
Level 1
Level 1
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Good day,

I'm currently having some issues with sending data from the SAR-Result-Register to the SRAM. I want to sample 5.100 values and send them to the SRAM. For debugging reasons the UART component sends the array afterwards to my computer.

The problem is that the array doesn't get filled properly. I took the DMA source code from an example project but I'm not sure if I use the proper register as source for the DMA. The register part in the SAR datasheet is outdated unfortunately.

Please help me to find out what I've done wrong.

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1 Solution
Hari
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hi AdKl_3857101

The error is because the code is writing to the same location (sample[0]).

I have attached the modified code where it sets the new destination address everytime. This was done by modifying the Interrupt handler to the following way:

void InterruptHandler()

{

    if(interruptcounter >= SAMPLES)

    {

        ADC_StopConvert();

        Cy_DMA_Disable(DMA_ADC_RAM_HW);

        interruptcounter = 0;

        flag_convert_done = 1;      

    }

    else

    {

       interruptcounter += 1;

        DMA_ADC_RAM_SetDstAddress(&DMA_ADC_RAM_Descriptor_1, (uint32*) &(sample[interruptcounter]));

        DMA_ADC_RAM_ChannelEnable();

    }

    Cy_DMA_Channel_ClearInterrupt(DMA_ADC_RAM_HW, DMA_ADC_RAM_DW_CHANNEL);

}

Please try this and let us know if this is the requirement.

Thanks and regards

Harigovind

View solution in original post

3 Replies
Hari
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hi AdKl_3857101

The error is because the code is writing to the same location (sample[0]).

I have attached the modified code where it sets the new destination address everytime. This was done by modifying the Interrupt handler to the following way:

void InterruptHandler()

{

    if(interruptcounter >= SAMPLES)

    {

        ADC_StopConvert();

        Cy_DMA_Disable(DMA_ADC_RAM_HW);

        interruptcounter = 0;

        flag_convert_done = 1;      

    }

    else

    {

       interruptcounter += 1;

        DMA_ADC_RAM_SetDstAddress(&DMA_ADC_RAM_Descriptor_1, (uint32*) &(sample[interruptcounter]));

        DMA_ADC_RAM_ChannelEnable();

    }

    Cy_DMA_Channel_ClearInterrupt(DMA_ADC_RAM_HW, DMA_ADC_RAM_DW_CHANNEL);

}

Please try this and let us know if this is the requirement.

Thanks and regards

Harigovind

Hello Harigovind,

thank you so much for your reply. It's working now.

I still have a question: shouldn't the auto-increment destination function of the DMA rule out my problem as well? As far as I can remember it worked on my PSoC 3 like that, but now it doesn't apparently.

Thanks and best regards,

Adrian

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Hari
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hello AdKl_3857101

The auto increment works only as long as the XY loop is not complete. I have attached the pseudo code from architecture TRM that demonstrates 2-D transfer.

// DST_ADDR is a pointer to an object of type defined by DST_TRANSFER_SIZE

// SRC_ADDR is a pointer to an object of type defined by SRC_TRANSFER_SIZE

// t_DATA_SIZE is the type associated with the DATA_SIZE

for (Y_IDX = 0; Y_IDX <= Y_COUNT; Y_IDX++)

{

     for (X_IDX = 0; X_IDX <= X_COUNT; X_IDX++)

     {

          DST_ADDR[X_IDX * DST_X_INCR + Y_IDX * DST_Y_INCR ] =

               (t_DATA_SIZE) SRC_ADDR[X_IDX * SRC_X_INCR + Y_IDX * SRC_Y_INCR];

     }

}

The source address is incremented only in the loop, and since the code is only configured to transmit one data element, the source address is not incremented. Once the DMA transfer is complete, the DMA is reinitialized and the source address is configured to the starting address.

Hope this answers your question. Do let us know in case of any further queries.

Thanks and regards

Harigovind