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PSoC™ 6 Forum Discussions

DaBr_4777916
Level 2
Level 2
25 sign-ins 10 replies posted 10 sign-ins

Using the PSoC6 PDM to PCM converter to convert data input from two digital MEMS microphones in PDM format to 16 bit PCM.  The PDM clock is determined by dividing a high frequency clock (16307.692kHz) by 8 = 2038.46kHz, which is further divided by 64 to determine the PCM sampling rate = 31.85kHz.  This PCM data is then downsampled by a factor of 4, and written to the I2S TX_FIFO where 16 bit words are output at a frame rate of 7.963kHz.  More specifically, two separate DMA transfers are used to transfer data output by the PDM to PCM converter to an audio buffer, and from the audio buffer to the I2S TX_FIFO.  When I listen to the I2S audio output, it is as expected for the first 1-2 minutes after program execution, but then I hear static, indicating that data is being read from the audio buffer faster than it is being written to.  This problem does not occur if there is no downsampling and the same value is used for the PCM sampling rate and I2S frame rate.  Any suggestions on how to ensure correct synchronization  of the PDM to PCM converted data and I2S audio output when the data is downsampled first?

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You're correct.  There was no problem with clock synchronization (same high frequency clock being used by PDM to PCM converter and I2S).  The problem was that I was enabling the DMA transfer from the PDM to PCM converter RX FIFO to the audio buffer after doing signal processing that took > 4ms (2 Y loop transfer times), which resulted in data in the RX FIFO being overwritten by new incoming audio data before being processed and transferred to the I2S TX FIFO.  Initial tests suggest this was the source of the static in the audio output.

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RodolfoGL
Employee
Employee
250 sign-ins 5 comments on KBA First comment on KBA

If you are using the internal HFCLK1 to clock both blocks - PDM/PCM and I2S, you should not see any synchronization issues, since both blocks can generate the exact same sample rate. Even if you might have some filter in firmware to process the PCM data, as long you downsample it correctly, they would be in sync.

Do you have a project we can look at?

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You're correct.  There was no problem with clock synchronization (same high frequency clock being used by PDM to PCM converter and I2S).  The problem was that I was enabling the DMA transfer from the PDM to PCM converter RX FIFO to the audio buffer after doing signal processing that took > 4ms (2 Y loop transfer times), which resulted in data in the RX FIFO being overwritten by new incoming audio data before being processed and transferred to the I2S TX FIFO.  Initial tests suggest this was the source of the static in the audio output.

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