Is "retarget-io" a standard process to initial a GPIO ?!

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Tim_Shih
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Dear Receiver,

In some GPIO sample codes, we can see their initial process with "retarget-io" function.

But in some GPIO sample codes, we don't see "retarget-io" function.

So I feel a little confused about ,,,

Is "retarget-io" a standard process to initial a GPIO ?!

When we need to use "retarget-io" function ?!

Thank you so much.

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PandaS
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Hi @Tim_Shih ,

retarget-io function is used when we want to use use UART communication and would like to redirect our standard library functions like printf's and scanf's to kitprog on the board. This helps us send or recieve commands over serial terminal of PC.

This is not an essential part of GPIO initialisation. It is used while configuring UART if you want the above mentioned feature.

 

Warm Regards

Sobhit

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PandaS
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Hi @Tim_Shih ,

retarget-io function is used when we want to use use UART communication and would like to redirect our standard library functions like printf's and scanf's to kitprog on the board. This helps us send or recieve commands over serial terminal of PC.

This is not an essential part of GPIO initialisation. It is used while configuring UART if you want the above mentioned feature.

 

Warm Regards

Sobhit

Tim_Shih
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Dear Sobhit,

Could I say retarget-io function is only for configuring UART if I want the above mentioned feature ?!

Thank you so much.

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PandaS
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Hi @Tim_Shih ,

Yes you are right. In case you wonder what all are necessary for GPIO initialization. Refer the following:

https://infineon.github.io/psoc6pdl/pdl_api_reference_manual/html/group__group__gpio.html

Warm Regards

Sobhit

Tim_Shih
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Level 5
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Dear Sobhit,

ok ok, thank you.

BTW, HAL library also can do the same thing. (to initial GPIO and to drive GPIO)

Base on above, could you please guide me,,,

In what condition you will use HAL library ?!

In what condition you will use PDL library ?!

As I know, if I use Device Configurator to configure peripherals, the related library will be based on PDL.

so I feel confused about if I want to HAL library to configure peripherals,,,

is there any standardized steps based on HAL library to configure peripherals ?! 

Thank you so much.

 

  

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PandaS
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Hi @Tim_Shih ,

I would suggest go step by step:

1. Try using Device Configurator first as the GUI tool would allow you to configure with ease

2. HAL is abstracted and easier to start with. I would suggest refer the API Reference Manual and try the code snippets step by step present in them.

https://infineon.github.io/psoc6hal/html/index.html

3. PDL lets you configure at register level. Gives you more control over the hardware. Similarly, you can follow the PDL API Reference Manual and follow the code snippets.

https://infineon.github.io/psoc6pdl/pdl_api_reference_manual/html/modules.html

I would suggest doing some small exercises like configuring GPIO, UART, SPI, I2C.... 

First try using GUI, then HAL and then PDL.

 

I hope this helps you getting acquainted with our drivers.

Thanks and Warm Regards

Sobhit

Tim_Shih
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Dear Sobhit, 

ok ok, very appreciate your feedback. Sorry, I have one more question,,,

About Smart-IO Configurator,,,

Because I can use "cyhal_gpio_init(...);" to initial IO and,,,

I also can use "cyhal_gpio_toggle(...);" to control each IO. Based on this, I think it is enough to control GPIO.

So I feel a little confused about what's the function of "Smart-IO Configurator." ?!

In what condition, I need to use this function ?

Thank you so much.

 

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PandaS
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Hi @Tim_Shih ,

The Smart I/O block adds programmable logic to an I/O port. This programmable logic integrates board-level Boolean logic functionality such as AND, OR, and XOR into the port.
The Smart I/O block has these features:

  • Integrate board-level Boolean logic functionality into a port 
  • Ability to preprocess HSIOM input signals from the GPIO port pins
  • Ability to post-process HSIOM output signals to the GPIO port pins

The Smart I/O driver provides an API to configure and access the Smart I/O hardware present between the GPIOs (pins) and HSIOMs (pin muxes) on select device ports.

PandaS_0-1658751066981.png

For more information refer PSoC6 Architecture TRM: https://www.infineon.com/dgdl/Infineon-PSoC_6_MCU_PSoC_62_Architecture_Technical_Reference_Manual-Ad...

It can be used to perform simple logic operations on peripheral and GPIO signals at the GPIO port. Features include,

  1. Purely combinatorial logic using 8 Look-Up Tables (LUT).
  2. Mixed sequential and combinatorial logic using 8 LUTs and 1 Data Unit (DU).
  3. Counters and shift registers using 8-bit multi-function DU (simplified ALU).
  4. Operational in device active, sleep and deep-sleep power modes.

Warm regards

Sobhit

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