How to design BLE on Dual CPU with MTB3.0

[Max_Li]

In PSoC Creator, we can design BLE on Dual CPU. there is an option in configure "Contoller on CM0+, Host and Profiles on CM4".

Now we start use MTB3.0. How to implement this?

Thanks!

Max

[Yugandhar]

Hello,

Please refer to the section 'Complete BLE Protocol Dual CPU Mode' (in Configuration Considerations) in the PSoC6 BLE Middleware library. In this mode, the BLE functionality is split between the CM0+ (controller) and CM4 (host) CPU cores. The controller part is implemented in BLESS controller CM0+ pre-built image. It uses IPC for communication between the two CPU cores that run the controller and host.

Please refer to the below community link.

https://community.infineon.com/t5/PSoC-6-SDK/Sample-Code-Setup-for-M0-BLE-CM0P-BLESS/m-p/336913#M510

Thanks,
P Yugandhar.

[Yugandhar · Accepted solution]

Hello @Max_Li ,

From MTB3.0 onwards AIROC BTStack is used, and the old BLESS stack is removed. With this AIROC BTStack, you can use controller only on CM0 and AIROC host stack/App only on CM4. CM0 is exclusively reserved for controller stack.

Thanks,
P Yugandhar.