How to Debug the CYBLE-416045-02 using the SEGGER J-Link?

[JuDa_1051176]

I'm using the CY8CPROTO-063-BLE dev board and want to use the SEGGER J-Link to debug via SWD.

The device is not in the J-Link Cypress list of supported devices. My question is, how can I configure the j-link to be able to debug on this dev board?

Note: I removed the KitProg section of the pcb. I also provide power to the board via an external 3.3V source.

I connected the J-Link and can see the Vtarg 3.3V.

Any insight would be appreciated.

[JuDa_1051176]

Here is some extra info from the JLink command line trying the CY8C6XX7_CM4 device:

Type "connect" to establish a target connection, '?' for help

J-Link>connect

Please specify device / core. <Default>: CY8C6XX7_CM4

Type '?' for selection dialog

Device>

Please specify target interface:

  J) JTAG (Default)

  S) SWD

  T) cJTAG

TIF>S

Specify target interface speed [kHz]. <Default>: 4000 kHz

Speed>1000

Device "CY8C6XX7_CM4" selected.

Connecting to target via SWD

ConfigTargetSettings() start

********************************************

InitTarget for PSoC6 Cortex-M4 script

********************************************

ConfigTargetSettings() end

InitTarget() start

********************************************

InitTarget for PSoC6 Cortex-M4 script

********************************************

InitTarget() end

Found SW-DP with ID 0x6BA02477

AP map detection skipped. Manually configured AP map found.

AP[0]: AHB-AP (IDR: Not set)

AP[1]: AHB-AP (IDR: Not set)

AP[2]: AHB-AP (IDR: Not set)

AP[2]: Skipped. Could not read AHB ROM register

Cannot connect to target.

J-Link>

[DheerajK_81 · Accepted solution]

The CYBLE-416045-02 BLE Module contains the PSoC 6 MCU, CY8C6347BZI-BLD53. Hence, you can select CY8C6xx7_CM4 and connect using SWD interface.

I tried it and it works. Attaching the log for reference.

The error you are seeing might be due to wrong physical connections between JLink and the target.

Connect P6.VDD and GND to the 3.3V power supply source.

Connect the J5 header in the following fashion:

Do not connect any pull up resistors on the SWDIO line.

Regards,

Dheeraj

[JuDa_1051176]

Thanks for following up Dheeraj!

I was able to communicate by lowering the speed. But it's not reliable. it works sometime but not all the time.

My JLink hardware is:

Connecting to J-Link via USB...O.K.

Firmware: J-Link ARM V8 compiled Nov 28 2014 13:44:46

Hardware version: V8.00

S/N: xxxxxxxxxxx

License(s): FlashBP, GDB

OEM: SEGGER-EDU

VTref=3.261V

I will either buy a more recent debugger or try my P&E multilink.

I will post my result here when completed.

Thanks!

[JuDa_1051176]

Greetings Dheeraj,

I found on the Segger website the Supported Hardware Feature for each version.

Software and Hardware Features Overview - SEGGER Wiki

Mine was a JLINK v8 and the Cortex-M4 is not supported.

I guess I have to buy a newer one.

Thanks for your help!

Sincerely,

[JuDa_1051176]

I want to confirm that after receiving the new JLink-mini hardware I was able to connect to the PSoC 6 without issues.

Thanks for the help.

[nghu_4453751]

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