How much power is saved by disabling the TRNG between uses?

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GrCa_1363456
Level 6
Level 6
50 likes received Beta tester First comment on KBA

Does the disabling or freeing of the TRNG help reduce power consumption?

I wasn't able to find a value in the datasheet indicating how much power the TRNG consumes. Is there a nominal power consumption value that can be used to determine if it is better to be enabling/disabling the TRNG for each 32-bit value or if it would be better to generate multiple 32-byte values in succession without disabling the TRNG after each one.

The example, "Cryptograhpy_TRNG_Demonstration" for PSoC 63 in ModusToolbox appears to be enabling/disabling the True Random Number Generator (TRNG) for each operation.

      /* Initialize the TRNG generator block*/
      result = cyhal_trng_init(&trng_obj);

      if (result == CY_RSLT_SUCCESS)
      {

 

      ......

      /* Free the TRNG generator block */
      cyhal_trng_free(&trng_obj);
      }

If my understanding of how the TRNG within the PSoC 6 works is incorrect, what information is available that may improve my understanding? I did find good information in both the PSoC 63 Architecture and Register TRMs. https://documentation.infineon.com/html/psoc6/zrs1651212645947.html 

Also Reference: PSoC 6 TRNG Health Monitor 

Greg

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1 Solution
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Greg,

Good question.  I don't think that Infineon (Cypress) ever published data about the specific current consumption of the TRNG.

Here's a TRNG overview block diagram:

Len_CONSULTRON_0-1664627152925.png

In general principle, a true MOS digital circuit that is static (no change in logic state) should consume << 1uA.

It's only during the switching of the logic state does the circuit(s) consume power.  This would account for >99% of average current used when active.

In my study, I could not easily find a register to cut power to these circuits.   There probably is one.  It is probably used to cut power when the IC is in lower-power modes.  Chances are that the control to cut power is probably the same one to cut power to the whole crypto section of the IC.

If using a low-power mode is not doable for your application then you need to try to "disable" the following signals:

  • RO11_EN
  • RO15_EN
  • GARO15_EN
  • GARO31_EN
  • FIRO15_EN
  • FIRO31_EN
  • SAMPLE_CLOCK_DIV[] (if possible)

I haven't peeked into the cyhal_trng_free() function code to see if it disables any of the enables mentioned.  If it does, job done (?).

If not, you would need to potentially do it yourself by turning off the bits in the CRYPTO_TR_CTL1 register.

The SAMPLE_CLOCK_DIV is controlled in the CRYPTO_TR_CTL0 register and it doesn't appear that you can turn it off.  However, you can reduce the output frequency by /255.  That might help.

I suspect the reason that Cypress never specified the TRNG current used is that it is probably < 20uA.  For them to characterize that would require the TRNG be running in low-power mode which the power is probably removed in the LP mode.   Characterizing the current in active mode is probably like measuring a small stream of water in a river.  Not easy and highly subject to large fluctuations.

Len
"Engineering is an Art. The Art of Compromise."

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2 Replies
Len_CONSULTRON
Level 9
Level 9
Beta tester 500 solutions authored 1000 replies posted

Greg,

Good question.  I don't think that Infineon (Cypress) ever published data about the specific current consumption of the TRNG.

Here's a TRNG overview block diagram:

Len_CONSULTRON_0-1664627152925.png

In general principle, a true MOS digital circuit that is static (no change in logic state) should consume << 1uA.

It's only during the switching of the logic state does the circuit(s) consume power.  This would account for >99% of average current used when active.

In my study, I could not easily find a register to cut power to these circuits.   There probably is one.  It is probably used to cut power when the IC is in lower-power modes.  Chances are that the control to cut power is probably the same one to cut power to the whole crypto section of the IC.

If using a low-power mode is not doable for your application then you need to try to "disable" the following signals:

  • RO11_EN
  • RO15_EN
  • GARO15_EN
  • GARO31_EN
  • FIRO15_EN
  • FIRO31_EN
  • SAMPLE_CLOCK_DIV[] (if possible)

I haven't peeked into the cyhal_trng_free() function code to see if it disables any of the enables mentioned.  If it does, job done (?).

If not, you would need to potentially do it yourself by turning off the bits in the CRYPTO_TR_CTL1 register.

The SAMPLE_CLOCK_DIV is controlled in the CRYPTO_TR_CTL0 register and it doesn't appear that you can turn it off.  However, you can reduce the output frequency by /255.  That might help.

I suspect the reason that Cypress never specified the TRNG current used is that it is probably < 20uA.  For them to characterize that would require the TRNG be running in low-power mode which the power is probably removed in the LP mode.   Characterizing the current in active mode is probably like measuring a small stream of water in a river.  Not easy and highly subject to large fluctuations.

Len
"Engineering is an Art. The Art of Compromise."
Pushyanth_K
Moderator
Moderator
Moderator
100 sign-ins 10 solutions authored 50 replies posted

Greg, Len,

 

Thanks  @Len_CONSULTRON for the reply, For more information on power consumption of various components of PSoC63, refer Infineon-PSoC_6_MCU_PSoC_63_with_BLE_Datasheet_Programmable_System-on-Chip_(PSoC)-DataSheet-v16_00-E... .

Currently there is no clear documentation on power consumption of TRNG. We will address this issue to the right teams internally and get back to you.

 

Regards,

Pushyanth