That is correct. PSoC 6 512K part supports CapSense only in port 7, 8 and 9. This imposes a 16 GPIO limitation on these devices. Which means 15 CSD sensors + Cmod.
Note that you can expand the number of sensors by using the CSX sensing method where you can have a matrix arrangement with shared Tx and Rx sensors. CSX takes 2 external caps (CintA and CintB) and the remaining 14 GPIOs can be arranged to 7 Tx + 7 Rx which would give a total of 49 sensing elements.