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JeHu_3414236
Level 5
Level 5
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I am using a PSoC 62 CY8C627BZI-D54 with 288KB RAM.  On CM0 core I just have a main loop with a sleep call inside so I allocate 8KB RAM for it.  I allocate the remaining RAM to CM4 with starting address 0x08002000.  I don't see any compilation errors but the code running on CM4 will lock up.  If I allocate 32KB RAM to CM0 and set CM4 starting address to 0x08008000 I don't see any problems.  I tried setting 8KB RAM for CM0 and leaving CM4 RAM starting address at 0x08008000 and I don't see any problems either.  Is there some rule that says CM4 RAM cannot be in the first 32KB?  I assume if there are no compilation errors then there should be no problem.

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AchimE_41
Employee
Employee
10 sign-ins 5 sign-ins First comment on KBA

Hi,

can you share your project? What PDL version are you using?

I just tested it with an empty project and it worked for me.

- changed ram section length for M0+ to 0x2000

- Changed ram section origion on M4 to 0x08002000

No error and debugging was possible.

When I tried 4kiB I got an error regarding a regarding an overflow of the ram region with the stack.

regards,

Achim

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2 Replies
AchimE_41
Employee
Employee
10 sign-ins 5 sign-ins First comment on KBA

Hi,

can you share your project? What PDL version are you using?

I just tested it with an empty project and it worked for me.

- changed ram section length for M0+ to 0x2000

- Changed ram section origion on M4 to 0x08002000

No error and debugging was possible.

When I tried 4kiB I got an error regarding a regarding an overflow of the ram region with the stack.

regards,

Achim

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Thanks.  I am running a big application so it can be some problem on my side with memory usage.  I just wanted to make sure there are no limitations on the RAM starting address.

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